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IDT82P2281

Single T1/E1/J1 Long Haul / Short Haul Transceiver

Integrated Device Technology 

IDT82P2281

SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER

3.3 ADAPTIVE EQUALIZER

The Adaptive Equalizer can remove most of the signal distortion

due to intersymbol interference caused by cable attenuation and distor-

tion. Usually, the Adaptive Equalizer is off in short haul applications and

is on in long haul applications, which is configured by the EQ_ON bit.

The peak detector keeps on measuring the peak value of the

incoming signals during a selectable observation period. The observa-

tion period is selected by the UPDW[1:0] bits. A shorter observation

period allows quicker response to pulse amplitude variation, while a

longer observation period can minimize the possible overshoots.

Based on the observed peak value for a period, the equalizer will

be adjusted to achieve a normalized signal. The LATT[4:0] bits indicate

the signal attenuation introduced by the cable in approximately 2 dB per

step.

In short haul application, the receive sensitivity is -10 dB in both T1/

J1 and E1 modes. In long haul application, the receive sensitivity is -36

dB in T1/J1 mode or -43 dB in E1 mode.

3.4 DATA SLICER

The Data Slicer is used to generate a standard amplitude mark or a

space according to the amplitude of the input signals. The criteria of

mark or space generation are based on a selected ratio of the incoming

signal amplitude against the peak value detected during the observation

period. This ratio is selected by the SLICE[1:0] bits. The output of the

Data Slicer is forwarded to the Clock and Data Recovery unit.

Table 5: Related Bit / Register In Chapter 3.3 & Chapter 3.4

Bit

EQ_ON

UPDW[1:0]

SLICE[1:0]

LATT[4:0]

Register

Receive Configuration 1

Receive Configuration 2

Line Status Register 1

Address (Hex)

029

02A

037

3.5 CLOCK AND DATA RECOVERY

The Clock and Data Recovery is used to recover the clock signal

from the received data. It is accomplished by Digital Phase Locked Loop

(DPLL). The recovered clock tracks the jitter in the data output from the

Data Slicer and keeps the phase relationship between data and clock

during the absence of the incoming pulse.

Functional Description

15

October 7, 2003

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