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IDT82V2048L

OCTAL T1/E1 SHORT HAUL ANALOG FRONT END

Integrated Device Technology 

IDT82V2048L OCTAL T1/E1 SHORT HAUL ANALOG FRONT END

INDUSTRIAL TEMPERATURE RANGES

Table-1 Pin Description (Continued)

Name

TDP0

TDP1

TDP2

TDP3

TDP4

TDP5

TDP6

TDP7

TDN0

TDN1

TDN2

TDN3

TDN4

TDN5

TDN6

TDN7

TCLK0

TCLK1

TCLK2

TCLK3

TCLK4

TCLK5

TCLK6

TCLK7

RDP0

RDP1

RDP2

RDP3

RDP4

RDP5

RDP6

RDP7

RDN0

RDN1

RDN2

RDN3

RDN4

RDN5

RDN6

RDN7

RC0

RC1

RC2

RC3

RC4

RC5

RC6

RC7

Type

I

I

O

High

Imped-

ance

O

High

Imped-

ance

Pin No.

TQFP144 PBGA160

Description

Transmit and Receive Digital Data Interface

37

N2

30

L2

80

L13

73

N13

108

B13 TDPn/TDNn: Positive/Negative Transmit Data for Channel 0~7

101

D13 The NRZ data to be transmitted for positive/negative pulse is input on this pin. Data on TDPn/TDNn are

8

D2 active high and are sampled on the falling edges of TCLKn.

1

B2

TDPn

TDNn

Output Pulse

38

N3

0

0

Space

0

1

Negative Pulse

31

L3

79

L12

1

1

0

Positive Pulse

1

Space

72

N12

109

B12

102

D12

7

D3

144

B3

36

N1

29

81

74

107

100

9

L1

L14

N14

B14

D14

D1

TCLKn: Transmit Clock for Channel 0~7

The clock of 1.544 MHz (for T1 mode) or 2.048 MHz (for E1 mode) for transmit is input on this pin. The

transmit data at TDPn or TDNn is sampled into the device on the falling edges of TCLKn.

Different combinations of TCLKn and MCLK result in different transmit mode. It is summarized as Table-2

System Interface Configuration.

2

B1

40

P2

33

M2

77

M13

70

P13

111

A13

104

C13

5

C2 RDPn/RDNn: Positive/Negative Receive Data for Channel 0~7

142

A2 These pins output the raw RZ sliced data. The active polarity of RDPn/RDNn is determined by pin CLKE.

When pin CLKE is low, RDPn/RDNn is active low. When pin CLKE is high, RPDn/RDNn is active high.

41

P3 RDPn/RDNn will remain active during LOS. RDPn/RDNn is set into high impedance when the correspond-

34

M3 ing receiver is powered down.

76

M12

69

P12

112

A12

105

C12

4

C3

141

A3

39

P1

32

M1

78

M14 RCn: Receive Pulse for Channel 0~7

71

P14 RCn is the output of an internal exclusive OR (XOR) which is connected with RDPn and RDNn. The clock

110

A14 is recovered from the signal on RCn. If receiver n is powered down, the corresponding RCn will be in high

103

C14 impedance.

6

C1

143

A1

5

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