IDT74FCT2244ATSOG Просмотр технического описания (PDF) - Integrated Device Technology

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IDT74FCT2244ATSOG

FAST CMOS OCTAL BUFFER/LINE DRIVER

Integrated Device Technology 

IDT74FCT2244AT/CT

FAST CMOS OCTAL BUFFER/LINE DRIVER

INDUSTRIAL TEMPERATURE RANGE

POWER SUPPLY CHARACTERISTICS

Symbol

ΔICC

ICCD

Parameter

Quiescent Power Supply Current

TTL Inputs HIGH

Dynamic Power Supply

Current(4)

IC

Total Power Supply Current(6)

Test Conditions(1)

VCC = Max.

VIN = 3.4V(3)

VCC = Max.

Outputs Open

OEA or OEB = GND

One Input Toggling

50% Duty Cycle

VIN = VCC

VIN = GND

VCC = Max.

Outputs Open

fi = 10MHz

VIN = VCC

VIN = GND

50% Duty Cycle

OEA or OEB = GND

One Bit Toggling

VIN = 3.4V

VIN = GND

VCC = Max.

Outputs Open

fi = 2.5MHz

VIN = VCC

VIN = GND

50% Duty Cycle

OEA or OEB = GND

Four Bits Toggling

VIN = 3.4V

VIN = GND

Min. Typ.(2) Max.

Unit

—

0.5

2

mA

—

0.06

0.12

mA/

MHz

—

0.6

2.2

mA

—

0.9

3.2

—

1.2

3.4(5)

—

3.2

11.4(5)

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 5.0V, +25°C ambient.

3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of ΔICC formula. These limits are guaranteed but not tested.

6. IC = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ΔICC DHNT + ICCD (fCP/2+ fiNi)

ICC = Quiescent Current

ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)

DH = Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)

fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)

fi = Output Frequency

Ni = Number of Outputs at fi

All currents are in milliamps and all frequencies are in megahertz.

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

Symbol Parameter

tPLH

Propagation Delay

tPHL

Dx to Ox

tPZH

Output Enable Time

tPZL

tPHZ

Output Disable Time

tPLZ

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

Condition(1)

CL = 50pF

RL = 500Ω

74FCT2244AT

Min.(2)

Max.

1.5

4.8

1.5

6.2

1.5

5.6

74FCT2244CT

Min.(2)

Max.

Unit

1.5

4.1

ns

1.5

5.8

ns

1.5

5.2

ns

4

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