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IDT72041

CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9

Integrated Device Technology 

IDT72021, IDT72031, IDT72041

CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9

AC TEST CONDITIONS

Input Pulse Levels

Input Rise/Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

GND to 3.0V

5ns

1.5V

1.5V

See Figure 1

2677 tbl 10

MILITARY AND COMMERCIAL TEMPERATURE RANGES

5V

TO

OUTPUT

PIN

680Ω

1.1K

30pF*

2677 drw 04

or equivalent circuit

Figure 1. Output Load

* Includes scope and jig capacitances.

RS

W

R

AEF, EF

HF, FF

t RSC

t RS

t RSS

t RSS

t RSF1

t RSF2

Figure 2. Reset

NOTES:

1. EF, FF, HF, and AEF may change status during Reset, but flags will be valid at tRSC.

2. W and R = VIH around the rising edge of RS.

t RSR

2677 drw 05

R

Q 0 –Q 8

W

D 0 –D 8

t RC

t RR

tA

t RPW

tA

t RLZ

t WPW

t DV

DATA OUT VALID

t WC

t WR

t RHZ

DATA OUT VALID

t DS

tDH

DATA IN VALID

DATA IN VALID

NOTE:

1. Assume OE is asserted LOW.

Figure 3. Asynchronous Write and Read Operation

5.09

2677 drw 06

7

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