IDT70V657S(2008) Просмотр технического описания (PDF) - Integrated Device Technology

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Компоненты Описание

производитель

IDT70V657S
(Rev.:2008)

HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT70V659/58/57S

High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

Pin Names

Left Port

Right Port

Names

CE0L, CE1L

R/WL

CE0R, CE1R

R/WR

Chip Enables - (Input)

Read/Write Enable - (Input)

OEL

A0L - A16L(3)

OER

A0R - A16R(3)

Output Enable - (Input)

Address - (Input)

I/O0L - I/O35L

I/O0R - I/O35R

Data Input/Output

SEML

INTL

BUSYL

BE0L - BE3L

VDDQL

OPTL

SEMR

INTR

BUSYR

BE0R - BE3R

VDDQR

OPTR

M/S

VDD

Semaphore Enable - (Input)

Interrupt Flag - (Output)

Busy Flag - (Output)(4)

Byte Enables (9-bit bytes) - (Input)

Power (I/O Bus) (3.3V or 2.5V) - (Input)(1)

Option for selecting VDDQX - (Input)(1,2)

Master or Slave Select - (Input)

Power (3.3V) - (Input)(1)

VSS

TDI

TDO

TCK

TMS

TRST

Ground (0V) - (Input)

Test Data Input

Test Data Output

Test Logic Clock (10MHz)

Test Mode Select

Reset (Initialize TAP Controller)

4869 tbl 01

NOTES:

1. VDD, OPTX, and VDDQX must be set to appropriate operating levels prior to

applying inputs on I/OX.

2. OPTX selects the operating voltage levels for the I/Os and controls on that port.

If OPTX is set to VIH (3.3V), then that port's I/Os and controls will operate at 3.3V

levels and VDDQX must be supplied at 3.3V. If OPTX is set to VIL (0V), then that

port's I/Os and controls will operate at 2.5V levels and VDDQX must be supplied

at 2.5V. The OPT pins are independent of one another—both ports can operate

at 3.3V levels, both can operate at 2.5V levels, or either can operate at 3.3V

with the other at 2.5V.

3. Addresses A16x is a NC for IDT70V658. Also, Addresses A16x and A15x are

NC's for IDT70V657.

4. BUSY is an input as a slave (M/S = VIL).

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