IDT49FCT805APYG Просмотр технического описания (PDF) - Integrated Device Technology
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IDT49FCT805APYG Datasheet PDF : 7 Pages
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IDT49FCT805/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1)
Symbol Parameter
Conditions(2)
FCT805
Min.
Max.
FCT805A
Min.
Max.
Unit
tPLH PropagationDelay
CL = 50pF
1.5
5.6
1.5
5.3
ns
tPHL INA to OAn, INB to OBn
RL = 500Ω
tR
Output Rise Time
—
1.5
—
1.5
ns
tF
Output Fall Time
—
1.5
—
1.5
ns
tSK(O) Output skew: skew between outputs of all banks of
—
0.7
—
0.7
ns
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions
—
1
—
1
ns
of same output (|tPHL -– tPLH|)
tSK(PP) Part-to-part skew: skew between outputs of different
—
1.5
—
1.5
ns
packages at same power supply voltage,
temperature, package type and speed grade
tPZL OutputEnableTime
tPZH OEA to OAn, OEB to OBn
tPLZ OutputDisableTime
tPHZ OEA to OAn, OEB to OBn
1.5
8
1.5
7
1.5
8
ns
1.5
7
ns
NOTES:
1. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
2. See test circuits and waveforms.
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