CS853014BGLFT Просмотр технического описания (PDF) - Integrated Device Technology
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CS853014BGLFT
Integrated Device Technology
CS853014BGLFT Datasheet PDF : 19 Pages
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ICS853014
LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
Table 1. Pin Descriptions
Number
1, 2
3, 4
5, 6
7, 8
9, 10
11
12
13
14
15
16
17
18, 20
19
Name
Q0, Q0
Q1, Q1
Q2, Q2
Q3, Q3
Q4, Q4
VEE
CLK_SEL
PCLK0
PCLK0
VBB
PCLK1
PCLK1
VCC
EN
Type
Description
Output
Differential output pair. LVPECL/ECL interface levels.
Output
Differential output pair. LVPECL/ECL interface levels.
Output
Differential output pair. LVPECL/ECL interface levels.
Output
Differential output pair. LVPECL/ECL interface levels.
Output
Differential output pair. LVPECL/ECL interface levels.
Power
Input
Input
Input
Output
Input
Input
Power
Input
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Pullup/
Pulldown
Pulldown
Negative supply pin.
Clock select input. When HIGH, selects PCLK1/PCLK1 inputs. When LOW,
selects PCLK0/PCLK0 inputs. LVTTL / LVCMOS interface levels.
Non-inverting differential LVPECL clock input.
Inverting differential LVPECL clock input. VCC/2 default when left floating.
Bias voltage.
Non-inverting differential LVPECL clock input.
Inverting differential LVPECL clock input. VCC/2 default when left floating.
Positive supply pins.
Synchronizing clock enable. When LOW, clock outputs follow clock input.
When HIGH, Qx outputs are forced low, Qx outputs are forced high.
LVTTL/LVCMOS interface levels.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
RPULLDOWN Input Pulldown Resistor
RVCC/2
Pullup/Pulldown Resistors
Test Conditions
Minimum
Typical
75
50
Maximum
Units
kΩ
kΩ
IDT™ / ICS™ 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
2
ICS853014BG REV. DNOVEMBER 12, 2007
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