ICS854054 Просмотр технического описания (PDF) - Integrated Circuit Systems

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ICS854054

4:1 DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS854054

4:1

DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER

LVDS DRIVER TERMINATION

A general LVDS interface is shown in Figure 3. In a 100Ω

differential transmission line environment, LVDS drivers re-

quire a matched load termination of 100Ω across near the

receiver input. For a multiple LVDS outputs buffer, if only par-

tial outputs are used, it is recommended to terminate the un-

used outputs.

3.3V

LVDS_Driv er

3.3V

+

R1

100

-

100 Ohm Differiential Transmission Line

FIGURE 3. TYPICAL LVDS DRIVER TERMINATION

854054AG

www.icst.com/products/hiperclocks.html

9

REV. A MARCH 29, 2006

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