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ICS840008AR-01 Просмотр технического описания (PDF) - Integrated Circuit Systems

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Компоненты Описание
производитель
ICS840008AR-01
ICST
Integrated Circuit Systems ICST
ICS840008AR-01 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840008-01
FEMTOCLOCKS™ CRYSTAL-TO-LVCMOS/LVTTL
FREQUENCY SYNTHESIZER
TABLE
5D.
AC
CHARACTERISTICS,
V
DD
=
V
DDA
=
V
DDO
=
2.5V±5%,
TA
=
0°C
TO
70°C
Symbol Parameter
Test Conditions
Minimum Typical
fOUT
tsk(o)
tjit(Ø)
Output Frequency
Output Skew; NOTE 1, 3
RMS Phase Jitter (Random);
NOTE 2
Integration Range:
1.875MHz - 20MHz
125
TBD
0.53
tL
PLL Lock Time
TBD
tR / tF
Output Rise/Fall Time
20% to 80%
600
odc
Output Duty Cycle
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot which will follow the AC Characteristics Tables.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
160
Units
MHz
ps
ps
ms
ps
%
TABLE 5E. AC CHARACTERISTICS, VDD = VDDA = 2.5V±5%, VDDO = 1.8V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical
fOUT
tsk(o)
Output Frequency
Output Skew; NOTE 1, 3
125
TBD
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 2
Integration Range:
1.875MHz - 20MHz
0.49
tL
PLL Lock Time
TBD
tR / tF
Output Rise/Fall Time
20% to 80%
630
odc
Output Duty Cycle
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: Please refer to the Phase Noise Plot which will follow the AC Characteristics Tables.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
160
Units
MHz
ps
ps
ms
ps
%
840001AR-01
www.icst.com/products/hiperclocks.html
6
REV. A APRIL 7, 2005

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