Q67100-Q1841 Просмотр технического описания (PDF) - Infineon Technologies

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производитель

Q67100-Q1841

64-MBit Synchronous DRAM

Infineon Technologies 

HYB 39S64400/800/160BT(L)

64-MBit Synchronous DRAM

Address Input for Mode Set (Mode Register Operation)

BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Address Bus (Ax)

Operation Mode

CAS Latency BT Burst Length

Operation Mode

Burst Type

Mode Register (Mx)

BA1 BA0 M11 M10 M9 M8 M7 Mode

M3

Type

0000000

000 0 100

burst read /

burst write

burst read /

single write

0 Sequential

1 Interleave

CAS Latency

M6 M5 M4

Latency

000

001

0 10

011

100

10 1

110

111

Reserved

Reserved

2

3

Reserved

Burst Length

M2 M1 M0

Length

Sequential Interleave

000

001

0 10

011

100

10 1

110

111

1

1

2

2

4

4

8

8

Reserved

Reserved

Full Page*)

*) optional

SPS03409

Data Book

10

12.99

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