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HT32F2755

Holtek 32-bit Microcontroller with ARM Cortex™-M3 Core

Holtek Semiconductor 

32-bit ARM Cortex™-M3 MCU

HT32F1755/HT32F1765/HT32F2755

Flash Memory Controller

▀ Flash accelerator for maximum efficiency

▀ 32-bit word programming with In System Programming Interface (ISP) and In Application

Programming (IAP)

▀ Flash protection capability to prevent illegal access

The Flash Memory Controller, FMC, provides all the necessary functions and pre-fetch buffer for

the embedded on-chip Flash Memory. Since the access speed of the Flash Memory is slower than

the CPU, a wide access interface with a pre-fetch buffer is provided for the Flash Memory in order

to reduce the CPU waiting time which will cause CPU instruction execution delays. Flash Memory

word program/page erase functions are also provided.

Reset Control Unit

▀ Supply supervisor:

● Power-on Reset – POR

● Brown-out Detector – BOD

● Programmable Low Voltage Detector – LVD

The Reset Control Unit (RSTCU) has three kinds of reset, the power on reset, system reset and an

APB unit reset. The power on reset, known as a cold reset, resets the full system during power up.

A system reset resets the processor core and peripheral IP components with the exception of the

SWJ-DP controller. The resets can be triggered by an external signal, internal events and the reset

generators.

Clock Control Unit

▀ External 4 to 16MHz crystal oscillator

▀ External 32,768Hz crystal oscillator

▀ Internal 8MHz RC oscillator trimmed to ±2% accuracy at 3.3V operating voltage and 25°C

operating temperature

▀ Internal 32kHz RC oscillator

▀ Integrated system clock PLL

▀ Independent clock gating bits for peripheral clock sources

The Clock Control unit, CKCU, provides a range of oscillator and clock functions. These include

a High Speed Internal RC oscillator (HSI), a High Speed External crystal oscillator (HSE), a Low

Speed Internal RC oscillator (LSI), a Low Speed External crystal oscillator (LSE), a Phase Lock

Loop (PLL), a HSE clock monitor, clock prescalers, clock multiplexers and clock gating circuitry.

The clocks of the AHB, APB and CortexTM-M3 are derived from the system clock (CK_SYS)

which can come from the HSI, HSE or PLL. The Watchdog Timer and Real Time Clock (RTC) use

either the LSI or LSE as their clock source. The maximum operating frequency of the system core

clock (CK_AHB) can be up to 72MHz.

Rev. 1.00

8 of 45

August 13, 2012

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