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HT32F2755 Просмотр технического описания (PDF) - Holtek Semiconductor

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HT32F2755 Datasheet PDF : 45 Pages
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32-bit ARM Cortex™-M3 MCU
HT32F1755/HT32F1765/HT32F2755
2 Features
Core
32-bit ARM® Cortex™-M3 processor core
Up to 72MHz operation frequency
1.25 DMIPS/MHz (Dhrystone 2.1)
Single-cycle multiplication and hardware division
Integrated Nested Vectored Interrupt Controller (NVIC)
24-bit SysTick timer
The Cortex™-M3 processor is a general-purpose 32-bit processor core especially suitable for
products requiring high performance and low power consumption microcontrollers. It offers many
new features such as a Thumb-2 instruction set, hardware divider, low latency interrupt respond
time, atomic bit-banding access and multiple buses for simultaneous accesses. The Cortex™-M3
processor is based on the ARMv7 architecture and supports both Thumb and Thumb-2 instruction
sets.
On-chip Memory
128KB on-chip Flash memory for instruction/data and options storage
up to 64KB on-chip SRAM
Supports multiple boot modes
The ARM® Cortex™-M3 processor is structured using a Harvard architecture which uses separate
busses to fetch instructions and load/store data. The instruction code and data are both located in
the same memory address space but in different address ranges. The maximum address range of
the Cortex™-M3 is 4GB due to its 32-bit bus address width. Additionally, a pre-defined memory
map is provided by the Cortex™-M3 processor to reduce the software complexity of repeated
implementation for different device vendors. However, some regions are used by the ARM®
Cortex™-M3 system peripherals. Refer to the ARM® Cortex™-M3 Technical Reference Manual
for more information. The Figure 2. shows the memory map of the HT32F1755/1765/2755 series of
devices, including Code, SRAM, peripheral, and other pre-defined regions.
Rev. 1.00
7 of 45
August 13, 2012

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