HT45F12 Просмотр технического описания (PDF) - Holtek Semiconductor
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HT45F12 Datasheet PDF : 103 Pages
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HT45F12
8-Bit Flash MCU with Op Amps & Comparators
Pin Description
Pin Name
PA0/CNP
PA1/C1OUT/
TMR
PA2/A1P/
C2OUT
PA3/A1N/INT0
PA4/A1E
PA5/A2P/PFD
PA6/A2N/BZ
PA7/A2E/BZ
PB0/INT1
PB1
PB2
PB3
PB6
PC0/OSC1
PC1/OSC2
PC4/VCAP
Function
PA0
CNP
PA1
C1OUT
TMR
PA2
A1P
C2OUT
PA3
A1N
INT0
PA4
A1E
PA5
A2P
PFD
PA6
A2N
BZ
PA7
A2E
BZ
PB0
INT1
PB1
PB2
PB3
PB6
PC0
OSC1
PC1
OSC2
PC4
VCAP
OPT
PAPU
PAWU
CMP1C1
PAPU
PAWU
CMP1C1
—
PAPU
PAWU
OPA1C1
CMP2C1
PAPU
PAWU
OPA1C1
—
PAPU
PAWU
OPA1C1
PAPU
PAWU
OPA2C1
MISC
PAPU
PAWU
OPA2C1
BPCTL
PAPU
PAWU
OPA2C1
BPCTL
PBPU
MISC
—
PBPU
MISC
PBPU
MISC
PBPU
MISC
PBPU
PCPU
CO
PCPU
CO
PCPU
LDOC
I/T
ST
CMPI
ST
—
ST
ST
OPAI
—
ST
OPAI
ST
ST
—
ST
OPAI
—
ST
OPAI
—
ST
—
—
ST
ST
ST
ST
ST
ST
ST
HXT
ST
—
ST
—
O/T
CMOS
CMOS
CMOS
CMPO
—
CMOS
—
CMPO
CMOS
—
—
CMOS
OPAO
CMOS
—
CMOS
CMOS
—
CMOS
CMOS
OPAO
CMOS
CMOS
NMOS
—
CMOS
NMOS
CMOS
NMOS
CMOS
NMOS
CMOS
CMOS
—
CMOS
HXT
CMOS
—
Description
General purpose I/O. Register enabled pull-up and
wake-up.
Comparator input pin
General purpose I/O. Register enabled pull-up and
wake-up.
Comparator 1 output pin
External Timer clock input
General purpose I/O. Register enabled pull-up and
wake-up.
OPA1 non-inverting input pin
Comparator 2 output pin
General purpose I/O. Register enabled pull-up and
wake-up.
OPA1 inverting input pin
External interrupt 0 input pin
General purpose I/O. Register enabled pull-up and
wake-up.
OPA1 output pin
General purpose I/O. Register enabled pull-up and
wake-up.
OPA2 non-inverting input pin
PFD output
General purpose I/O. Register enabled pull-up and
wake-up.
OPA2 inverting input pin
Buzzer output
General purpose I/O. Register enabled pull-up and
wake-up
OPA2 output pin
Complementary buzzer output
General purpose I/O. Register enabled pull-up and
output NMOS structure.
External interrupt 1 input pin
General purpose I/O. Register enabled pull-up and
output NMOS structure.
General purpose I/O. Register enabled pull-up and
output NMOS structure.
General purpose I/O. Register enabled pull-up and
output NMOS structure.
General purpose I/O. Register enabled pull-up
General purpose I/O. Register enabled pull-up
HXT/ERC pin
General purpose I/O. Register enabled pull-up
HXT pin
General purpose I/O. Register enabled pull-up
LDO output capacitor pin. Connect a 0.1μF capacitor.
Rev. 1.20
9
February 27, 2013
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