HT46R12 Просмотр технического описания (PDF) - Holtek Semiconductor

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HT46R12

A/D Type 8-Bit OTP MCU

Holtek Semiconductor 

HT46R12

Program Memory - ROM

The program memory is used to store the program in-

structions which are to be executed. It also contains

data, table, interrupt entries, and is organized into

2048´14 bits, addressed by the program counter and ta-

ble pointer.

Certain locations in the program memory are reserved

for special usage:

· Location 000H

Location 000H is reserved for program initialization.

After a chip reset, the program always begins execu-

tion at location 000H.

· Location 004H

Location 004H is reserved for the Comparator 0 inter-

rupt service program. If the Comparator 0 output pin is

activated, and If the interrupt is enabled and the stack

is not full, the program begins execution at location

004H.

· Location 008H

Location 008H is reserved for the Comparator 1 inter-

rupt service program. If the Comparator 1 output pin is

activated, and if the interrupt is enabled and the stack

is not full, the program begins execution at location

008H.

000H

D e v ic e In itia liz a tio n P r o g r a m

004H

C o m p a r a to r 0 In te r r u p t S u b r o u tin e

008H

C o m p a r a to r 1 In te r r u p t S u b r o u tin e

00C H

T im e r /E v e n t C o u n te r 0 In te r r u p t S u b r o u tin e

010H

T im e r /E v e n t C o u n te r 1 In te r r u p t S u b r o u tin e

014H

A /D C o n v e r te r In te r r u p t S u b r o u tin e

P ro g ra m

M e m o ry

n00H

L o o k - u p T a b le ( 2 5 6 w o r d s )

nFFH

L o o k - u p T a b le ( 2 5 6 w o r d s )

7FFH

1 4 b its

N o te : n ra n g e s fro m 0 to 7

Program Memory

· Location 00CH

Location 00CH is reserved for the Timer/Event Coun-

ter 0 interrupt service program. If a timer interrupt re-

sults from a Timer/Event Counter 0 overflow, and if the

interrupt is enabled and the stack is not full, the pro-

gram begins execution at location 00CH.

· Location 010H

Location 010H is reserved for the Timer/Event Coun-

ter 1 interrupt service program. If a timer interrupt re-

sults from a Timer/Event Counter 1 overflow, and if the

interrupt is enabled and the stack is not full, the pro-

gram begins execution at location 010H.

· Location 014H

Location 014H is reserved for the A/D converter inter-

rupt service program. If an A/D converter interrupt re-

sults from an end of A/D conversion, and if the

interrupt is enabled and the stack is not full, the pro-

gram begins execution at location 014H

· Table location

Any location in the ROM space can be used as

look-up tables. The instructions ²TABRDC [m]² (the

current page, 1 page=256 words) and ²TABRDL [m]²

(the last page) transfer the contents of the lower-order

byte to the specified data memory, and the

higher-order byte to TBLH (08H). Only the destination

of the lower-order byte in the table is well-defined, the

other bits of the table word are transferred to the lower

portion of TBLH, and the remaining 2 bits are read as

²0². The Table Higher-order byte register (TBLH) is

read only. The table pointer (TBLP) is a read/write reg-

ister (07H), which indicates the table location. Before

accessing the table, the location must be placed in

TBLP. The TBLH is read only and cannot be restored.

If the main routine and the ISR (Interrupt Service Rou-

tine) both employ the table read instruction, the con-

tents of the TBLH in the main routine are likely to be

changed by the table read instruction used in the ISR.

Errors can occur. In other words, using the table read

instruction in the main routine and the ISR simulta-

neously should be avoided. However, if the table read

instruction has to be applied in both the main routine

and the ISR, the interrupt is supposed to be disabled

prior to the table read instruction. It will not be enabled

until the TBLH has been backed up. All table related

instructions require two cycles to complete the opera-

tion. These areas may function as normal program

memory depending upon the requirements.

Table Location

Instruction

*10

*9

*8

*7

*6

*5

*4

*3

*2

*1

*0

TABRDC [m] P10 P9

P8 @7 @6 @5 @4 @3 @2 @1 @0

TABRDL [m]

1

1

1

@7 @6 @5 @4 @3 @2 @1 @0

Note: *10~*0: Table location bits

@7~@0: Table pointer bits

Table Location

P10~P8: Current program counter bits

Rev. 1.00

7

November 1, 2005

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