HT46R065B Просмотр технического описания (PDF) - Holtek Semiconductor

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HT46R065B

Enhanced A/D Type 8-Bit OTP MCU

Holtek Semiconductor 

HT46R064B/065B/066B

HT46R066B

Pin Name Function OPT I/T O/T

Description

PA0/AN0

PA0

PAPU

PAWK

ST

CMOS General purpose I/O. Register enabled pull-up and wake-up.

AN0 ADCR AN ¾ A/D channel 0

PA1/PFD/AN1

PA1

PFD

PAPU

PAWK

ST

CMOS General purpose I/O. Register enabled pull-up and wake-up.

CTRL0 ¾ CMOS PFD output

AN1 ADCR AN ¾ A/D channel 1

PA2/TC0/AN2

PA2

PAPU

PAWK

ST

CMOS General purpose I/O. Register enabled pull-up and wake-up.

TC0

¾ ST ¾ External Timer 0 clock input

AN2 ADCR AN ¾ A/D channel 2

PA3/INT/AN3

PA3

PAPU

PAWK

ST

CMOS General purpose I/O. Register enabled pull-up and wake-up.

INT

¾ ST ¾ External interrupt input

AN3 ADCR AN ¾ A/D channel 3

PA4/TC1/PWM0

PA4

PAPU

PAWK

ST

CMOS General purpose I/O. Register enabled pull-up and wake-up.

TC1

¾ ST ¾ External Timer 1 clock input

PWM0 CTRL0 ¾ CMOS PWM output

PA5/OSC2

PA5

OSC2

PAPU

PAWK

CO

ST CMOS General purpose I/O. Register enabled pull-up and wake-up.

¾ OSC Oscillator pin

PA6/OSC1

PA6

OSC1

PAPU

PAWK

ST

CMOS General purpose I/O. Register enabled pull-up and wake-up.

CO OSC ¾ Oscillator pin

PA7/RES

PA7

RES

PAWK ST NMOS General purpose I/O. Register enabled wake-up.

CO ST ¾ Reset input

PB0/SCOM0

PB0 PBPU ST CMOS General purpose I/O. Register enabled pull-up.

SCOM0 SCOMC ¾ SCOM Software controlled 1/2 bias LCD COM

PB1/SCOM1

PB1 PBPU ST CMOS General purpose I/O. Register enabled pull-up.

SCOM1 SCOMC ¾ SCOM Software controlled 1/2 bias LCD COM

PB2/SCOM2

PB2 PBPU ST CMOS General purpose I/O. Register enabled pull-up.

SCOM2 SCOMC ¾ SCOM Software controlled 1/2 bias LCD COM

PB3 PBPU ST CMOS General purpose I/O. Register enabled pull-up.

PB3/[PFD]/SCOM3 PFD CTRL0 ¾ CMOS PFD output

SCOM3 SCOMC ¾ SCOM Software controlled 1/2 bias LCD COM

PB4/[TC0]

PBn PBPU ST CMOS General purpose I/O. Register enabled pull-up.

TC0 CTRL0 ST ¾ External Timer 0 clock input

PB5/[INT]

PBn PBPU ST CMOS General purpose I/O. Register enabled pull-up.

INT CTRL0 ST ¾ External interrupt input

Rev. 1.00

11

April 8, 2011

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