HT48R062(2006) Просмотр технического описания (PDF) - Holtek Semiconductor
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HT48R062 Datasheet PDF : 31 Pages
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HT48R062/HT48C062
The chip reset status of the registers is summarized in the following table:
Register
Program Counter
MP
ACC
TBLP
TBLH
WDTS
STATUS
PA
PAC
PB
PBC
Reset
(Power-on)
000H
-xxx xxxx
xxxx xxxx
xxxx xxxx
--xx xxxx
0000 0111
--00 xxxx
1111 1111
1111 1111
---- -111
---- -111
WDT Time-out
(Normal Operation)
000H
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0111
--1u uuuu
1111 1111
1111 1111
---- -111
---- -111
RES Reset
(Normal Operation)
000H
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0111
--uu uuuu
1111 1111
1111 1111
---- -111
---- -111
RES Reset
(HALT)
000H
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
0000 0111
--01 uuuu
1111 1111
1111 1111
---- -111
---- -111
WDT Time-out
(HALT)*
000H
-uuu uuuu
uuuu uuuu
uuuu uuuu
--uu uuuu
uuuu uuuu
--11 uuuu
uuuu uuuu
uuuu uuuu
---- -uuu
---- -uuu
Note:
²*² means ²warm reset²
²u² means ²unchanged²
²x² means ²unknown²
Input/Output Ports
There are up to 11 bidirectional input/output lines in the
microcontroller labeled with port names PA and PB,
which are mapped to the data memory of [12H] and
[14H] respectively. All of these I/O ports can be used for
input and output operations. For input operation, these
ports are non-latching, that is, the inputs must be ready
at the T2 rising edge of instruction ²MOV A,[m]² (m=12H
or 14H). For output operation, all the data is latched and
remains unchanged until the output latch is rewritten.
Each I/O line has its own control register (PAC, PBC) to
control the input/output configuration. With this control
register, CMOS output or Schmitt trigger input with or
without pull-high resistor structures can be reconfigured
dynamically (i.e. on-the-fly) under software control. To
function as an input, the corresponding latch of the con-
trol register must write ²1². The input source also de-
pends on the control register. If the control register bit is
²1², the input will read the pad state. If the control regis-
ter bit is ²0², the contents of the latches will move to the
internal bus. The latter is possible in the ²read-modify-
write² instruction.
For output function, CMOS is the only configuration.
These control registers are mapped to locations 13H
and 15H.
V DD
D a ta B u s
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
R e a d D a ta R e g is te r
S y s te m W a k e -u p
( P A o n ly )
C o n tr o l B it P u ll- h ig h
D
Q
CK Q
S
D a ta B it
D
Q
CK Q
S
M
U
X
W a k e - u p O p tio n
Input/Output Ports
P A 0~P A 7
P B 0~P B 2
Rev. 1.11
9
October 30, 2006
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