HT48R062(2006) Просмотр технического описания (PDF) - Holtek Semiconductor

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HT48R062
(Rev.:2006)

Cost-Effective I/O Type 8-Bit MCU

Holtek Semiconductor 

HT48R062/HT48C062

0 0 H In d ir e c t A d d r e s s in g R e g is te r

01H

MP

02H

03H

04H

05H

ACC

06H

PCL

07H

TB LP

08H

TB LH

09H

W D TS

0A H

STATU S

0B H

0C H

0D H

0E H

0FH

10H

11H

12H

PA

13H

PAC

14H

PB

15H

PBC

16H

1FH

20H

G e n e ra l P u rp o s e

D a ta M e m o ry

(3 2 B y te s )

3FH

S p e c ia l P u r p o s e

D a ta M e m o ry

:U nused,

re a d a s "0 0 "

RAM Mapping

Indirect Addressing Register

Location 00H is an indirect addressing register that is

not physically implemented. Any read/write operation of

[00H] accesses data memory pointed to by MP (01H).

Reading location 00H itself indirectly will return the re-

sult 00H. Writing indirectly results in no operation.

The memory pointer register MP (01H) is a 7-bit register.

The bit 7 of MP is undefined and reading will return the

result ²1². Any writing operation to MP will only transfer

the lower 7-bit data to MP.

Accumulator

The accumulator closely relates to ALU operations. It is

also mapped to location 05H of the data memory and is

capable of carrying out immediate data operations. Data

movement between two data memory locations has to

pass through the accumulator.

Arithmetic and Logic Unit - ALU

This circuit performs 8-bit arithmetic and logic operation.

The ALU provides the following functions.

· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

The ALU not only saves the results of a data operation but

also changes the contents of the status register.

Status Register - STATUS

This 8-bit status register (0AH) contains the zero flag

(Z), carry flag (C), auxiliary carry flag (AC), overflow flag

(OV), power down flag (PDF) and watchdog time-out

flag (TO). It also records the status information and con-

trols the operation sequence.

With the exception of the TO and PDF flags, bits in the

status register can be altered by instructions like most

other register. Any data written into the status register

will not change the TO or PDF flags. In addition it should

be noted that operations related to the status register

may give different results from those intended. The TO

and PDF flags can only be changed by the Watchdog

Timer overflow, chip power-up, clearing the Watchdog

Timer and executing the ²HALT² instruction.

Bit No.

0

1

2

3

4

5

6~7

Label

C

AC

Z

OV

PDF

TO

¾

Function

C is set if the operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation; otherwise C is cleared. C is also affected by a ro-

tate through carry instruction.

AC is set if the operation results in a carry out of the low nibbles in addition or no borrow from

the high nibble into the low nibble in subtraction; otherwise AC is cleared.

Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.

OV is set if the operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa; otherwise OV is cleared.

PDF is cleared when either a system power-up or executing the ²CLR WDT² instruction.

PDF is set by executing the ²HALT² instruction.

TO is cleared by a system power-up or executing the ²CLR WDT² or ²HALT² instruction.

TO is set by a WDT time-out.

Unused bit, read as ²0²

Status (0AH) Register

Rev. 1.11

6

October 30, 2006

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