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HT1632C(2015) Просмотр технического описания (PDF) - Holtek Semiconductor

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Компоненты Описание
производитель
HT1632C
(Rev.:2015)
Holtek
Holtek Semiconductor Holtek
HT1632C Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Assignment
HT1632C
ROW22
ROW21
ROW20
ROW19
ROW18
ROW17
ROW16
ROW15
ROW14
ROW13
ROW12
ROW11
36 35 34 33 32 31 30 29 28 27 26 25
37
24
38
23
39
22
40
21
41
20
42
HT1632C
19
43
48 LQFP-A
18
44
17
45
16
46
15
47
14
48
13
1 2 3 4 5 6 7 8 9 10 11 12
VSS
COM2
COM1
COM0
VDD
SYNC
CS
RD
WR
DATA
OSC
VSS
ROW24/COM15
ROW23
ROW22
ROW21
ROW20
ROW19
ROW18
ROW17
ROW16
ROW15
ROW14
ROW13
ROW12
39 38 37 36 35 34 33 32 31 30 29 28 27
40
26
41
25
42
24
43
23
44
22
45
46
47
HT1632C
52 LQFP-A
21
20
19
48
18
49
17
50
16
51
15
52
14
1 2 3 4 5 6 7 8 9 10 11 12 13
COM3
VSS
COM2
COM1
COM0
VDD
SYNC
CS
RD
WR
DATA
OSC
VSS
Note: When the 48-pin LQFP is selected, this device does not support 1/16 duty.
Pin Description
Pad Name
I/O
Description
ROW0~ROW23
ROW24/COM15~
ROW31/COM8
O Line drivers. These pins drive the LEDs.
O Drive LED outputs or common outputs. Each COM pin is double bonded.
COM0~COM7
O Common outputs. Each COM pin is double bonded.
SYNC
If the RC Master Mode or EXT CLK Master Mode command is programmed, the
I/O
synchronous signal is output to SYN pin.
If the Slave Mode command is programmed, the synchronous signal is input from SYN
pin.
OSC
If the RC Master Mode command is programmed, the system clock source is from on-
I/O
chip RC oscillator and system clock is output to OSC pin.
If the Slave Mode or EXT CLK Master Mode command is programmed, the system clock
source is input from external clock via the OSC pin.
DATA
I/O Serial data input or output with pull-high resistor
WR
I
WRITE clock input with pull-high resistor Data on the DATA lines are latched into the
HT1632C on the rising edge of the WR signal.
READ clock input with pull-high resistor. The HT1632C RAM data is clocked out on the
RD
I falling edge of the RD signal. The clocked out data will appear on the DATA line. The host
controller can use the next rising edge to latch the clocked out data.
Chip select input with pull-high resistor When the CS line is high, the data and command
CS
I
read from or written to the HT1632C is disabled, and the serial interface circuit is also
reset. If CS is low, the data and command transmission between the host controller and
the HT1632C are all enabled.
VSS
VDD
Negative power supply, ground. In the PCB layout, all VSS pins should be connected to
the GND plane.
Positive power supply. In the PCB layout, all VDD pins should be connected to the power
plane.
Rev. 1.60
2
August 19, 2015

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