HS7516 Просмотр технического описания (PDF) - Signal Processing Technologies
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HS7516 Datasheet PDF : 8 Pages
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SPECIFICATIONS (continued)
(Typical @ 25°C, nominal power supply, VREF = +10V, unipolar unless otherwise noted)
PARAMETER
MIN. TYP. MAX.
ENVIRONMENTAL AND MECHANICAL
Operating Temperature
SP7516JN/KN
0
+70
SP7516AN/BN
–40
+85
HS3160–C
0
+70
HS3160–B
–55
+125
HS3160–B/883
–55
+125
Storage Temperature
–65
+150
Package
SP7516_N
24-pin SOIC
HS3160
22–pin Side–Brazed DIP
UNITS
°C
°C
°C
°C
°C
°C
CONDITIONS
Notes:
1. Digital input voltage must not exceed supply voltage or go below –0.5V ; “0” <0.8V; 2.4V < “1” ≤VDD.
2. AC or DC; use R6758–1 for fixed reference applications
3. Using the internal feedback resistor and an external op amp. The Scale Factor can be adjusted externally by variable resistors in series with the
reference input and/or in series to the internal feedback resistor. Please refer to the Applications Information section.
4. At 25°C; the output leakage current will create an offset voltage at the external op amps output. It doubles every 10°C temperature increase.
5. Integral Linearity is measured as the arithmetic mean value of the magnitudes of the greatest positive deviation and the greatest negative deviation from
the theoretical value for any given input combination.
6. Differential Linearity is the deviation of an output step form the theoretical value of 1LSB for any two adjacent digital input codes.
7. At 25°C, the output leakage current will create an offset voltage output. It doubles every 10°C temperature increase.
8. Using the internal feedback resistor and an external op amp.
9. Use series 470ohm resistor to limit startup current.
CHARACTERISTIC CURVES
(Typical @ + 25°C, VDD = + 15VDC, VREF = + 10VDC, unless otherwise noted.)
0.048
50
0.024
0.012
0.006
0.003
0.01
0.1
1
10
VREF -VOLTS
Integral Linearity Error vs. Reference Voltage
0.048%
0.024%
0.012%
0.006%
0.003%
4
2.5
6
8
10
12
14
16
18
V DD -VOLTS
Linearity vs. Supply Voltage
2.0
1.5
1.0
4
6
8
10
12
14
16
VDD -VOLTS
Power Supply Current vs. Voltage
18 10
40
30
2 LSB
20
1 LSB
10
1/2 LSB @ 16 BITS
0
0
10
20
30
40
50
VOS-mV
Additional Linearity Error vs. Output-Amplifier
Offset-Voltage (VREF = + 10V)
0.01
0.008
0.006
0.004
0.002
0
4
6
8
10
12
14
16
18
VDD -VOLTS
Gain Change vs. Supply Voltage
Corporation
SIGNAL PROCESSING EXCELLENCE
129
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