HDMP-0440 Просмотр технического описания (PDF) - HP => Agilent Technologies

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HDMP-0440

Quad Port Bypass Circuit for Fibre Channel Arbitrated Loops

HP => Agilent Technologies 

Simplified I/O Cells

O_LVTTL

VCC

I_LVTTL

VCC

VCC

GND

ESD

PROTECTION

GND

ESD

PROTECTION

GND

Figure 5. O-LVTTL and I-LVTTL simplified circuit schematic.

VBB

1.4 V

HS_OUT

75 Ω

VCCHS

VCC

VCC

VCC

TO_NODE[n]+

Z0 = 75 Ω 0.01 µF FM_NODE[n]+

HS_IN

+

–+

–

ESD

PROTECTION

TO_NODE[n]–

GND

GND

2*Z0 = 150 Ω

Z0 = 75 Ω 0.01 µF

FM_NODE[n]–

GND

GND

ESD

PROTECTION

NOTE:

1. FM_NODE[n] INPUTS SHOULD NEVER BE CONNECTED TO GROUND AS PERMANENT DAMAGE TO THE DEVICE MAY RESULT.

Figure 6. HS_OUT and HS_IN simplified circuit schematic.

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