H8/3068F Просмотр технического описания (PDF) - Renesas Electronics

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H8/3068F

16-Bit Single-Chip Microcomputer

Renesas Electronics 

Contents

Section 1 Overview............................................................................................................. 1

1.1 Overview........................................................................................................................... 1

1.2 Block Diagram.................................................................................................................. 6

1.3 Pin Description ................................................................................................................. 7

1.3.1 Pin Arrangement.................................................................................................. 7

1.3.2 Pin Functions ....................................................................................................... 8

1.3.3 Pin Assignments in Each Mode ........................................................................... 13

Section 2 CPU ...................................................................................................................... 19

2.1 Overview........................................................................................................................... 19

2.1.1 Features................................................................................................................ 19

2.1.2 Differences from H8/300 CPU ............................................................................ 20

2.2 CPU Operating Modes...................................................................................................... 21

2.3 Address Space................................................................................................................... 22

2.4 Register Configuration...................................................................................................... 23

2.4.1 Overview.............................................................................................................. 23

2.4.2 General Registers................................................................................................. 24

2.4.3 Control Registers ................................................................................................. 25

2.4.4 Initial CPU Register Values................................................................................. 26

2.5 Data Formats..................................................................................................................... 27

2.5.1 General Register Data Formats............................................................................ 27

2.5.2 Memory Data Formats ......................................................................................... 29

2.6 Instruction Set................................................................................................................... 30

2.6.1 Instruction Set Overview ..................................................................................... 30

2.6.2 Instructions and Addressing Modes..................................................................... 31

2.6.3 Tables of Instructions Classified by Function...................................................... 32

2.6.4 Basic Instruction Formats .................................................................................... 41

2.6.5 Notes on Use of Bit Manipulation Instructions ................................................... 42

2.7 Addressing Modes and Effective Address Calculation..................................................... 44

2.7.1 Addressing Modes ............................................................................................... 44

2.7.2 Effective Address Calculation ............................................................................. 46

2.8 Processing States............................................................................................................... 50

2.8.1 Overview.............................................................................................................. 50

2.8.2 Program Execution State ..................................................................................... 51

2.8.3 Exception-Handling State .................................................................................... 51

2.8.4 Exception-Handling Sequences ........................................................................... 53

2.8.5 Bus-Released State .............................................................................................. 54

Rev. 3.00 Sep 14, 2005 page vii of xxii

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