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HCPL-7560 Просмотр технического описания (PDF) - Avago Technologies

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HCPL-7560 Datasheet PDF : 18 Pages
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HCPL-7560
Optically Isolated Sigma-Delta (Σ-) Modulator
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The HCPL-7560 Optically Isolated Modulator and HCPL-
0872 Digital Interface IC or digital filter together form
an isolated programmable two-chip analog-to-digital
converter. The isolated modulator allows direct mea-
surement of motor phase currents in power inverters.
In operation, the HCPL-7560 Isolated Modulator (op-
tocoupler with 3750 VRMS dielectric withstand voltage
rating) converts a low-bandwidth analog input into a
high-speed one-bit data stream by means of a Sigma-
Delta (Σ-) over-sampling modulator. This modulation
provides for high noise margins and excellent immunity
against isolation-mode transients. The modulator data
and on-chip sampling clock are encoded and transmit-
ted across the isolation boundary where they are recov-
ered and decoded into separate high-speed clock and
data channels.
Features
8-bit Linearity
200 ns Conversion Time
(Pre-Trigger Mode 2 with HCPL-0872)
8-bit Effective Resolution with 5µs Signal Delay
(14-bit with 102 µs) (with HCPL-0872)
Fast 3 µs Over-Range Detection (with HCPL-0872)
± 200 mV Input Range with Single 5 V Supply
5% Internal Reference Voltage Matching
Offset Calibration (with HCPL-0872)
-40°C to +85°C Operating Temperature Range
15 kV/µs Isolation Transient Immunity
Safety Approval: UL 1577, CSA and
IEC/EN/DIN EN 60747-5-2
Applications
Motor Phase and Rail Current Sensing
Data Acquisition Systems
Industrial Process Control
Inverter Current Sensing
General Purpose Current Sensing and Monitoring
Input
Curr ent
1
8
2
SIGMA-
DELTA
MOD./
3
ENCODE
7
DECODE
6
4
5
HCPL-7560
HCPL-0872
or
Digital Filter
MCU
or
DSP
NOTE: A 0.1 μF bypass capacitor must be connected between pins VDD1 and GND1 and between pins VDD2 and GND2.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation, which may be induced by ESD.

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