GS9005B Просмотр технического описания (PDF) - Gennum -> Semtech
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GS9005B Datasheet PDF : 13 Pages
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+5V
10µ
+
SSI
0.1µ
+5V
ANALOG
DIGITAL
0.1µ
+5V 0.1µ
390
4 3 2 1 28 27 26
ECL
390
DATA
25
100
DATA
0.1µ
INPUT 75 47p
D 47p
75
E 22n 113
ND S +5V
E N ÷2
÷1
INPUTS 5 DDI
6
DDI
7 VCC2
8 SDI
9 SDI
10 ƒ/2
11 VEE3
GS9005B
SDO
24
SDO
23
SCO
22
SCO
SS1 21 +5V
SS0 20
CD 19
12 13 14 15 16 17 18
+5V
0.1µ
5.6p
910
10n
See Figure 18
100
100
100
390
390
10k
DATA
CLOCK
CLOCK
CARRIER
DETECT
OUTPUT
M IG STAR
OM ES ROUTED
LOOP
VOLTAGE
TEST
POINT
All resistors in ohms, all capacitors in microfarads, all inductors in henries unless otherwise stated.
C D Fig.14 GS9005B Typical Test Circuit Using +5V Supply
RE W TEST SETUP
E Figure 14 shows a typical circuit for the GS9005B using a +5
T volt supply. The four 0.1µF decoupling capacitors must be
N placed as close as possible to the corresponding VCC pins.
O The loop voltage can be conveniently measured across the
N R 10nF capacitor in the loop filter. Tuning procedures are
described in the Temperature Compensation Section
O (page 11). The fixed value frequency setting resistors should
F be placed close to the corresponding pins on the GS9005B.
When the Direct Digital Inputs are not used, one of these
inputs should be connected to VCC to avoid picking up noise
and unwanted signals.
The Carrier Detect is an open-collector active high output
requiring a pull-up resistor of approximately 10 kΩ.
The SS0, SS1, CD pins should see a low AC impedance. This
is particularly important when driving the SS0, SS1 pins with
external logic. The use of 1 nF decoupling capacitors at these
The layout of the loop filter and RVCO components requires pins ensures this.
careful attention. This has been detailed in an application
note entitled "Optimizing Circuit and Layout Design of the
GS9005A/15A", Document No. 521 - 32 - 00.
Figure 15 shows the GS9005B connections when using a -5
volt supply.
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