GS9005ACTJ Просмотр технического описания (PDF) - Gennum -> Semtech
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GS9005ACTJ Datasheet PDF : 12 Pages
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+5V
10µ
+
SSI
0.1µ
+5V
ANALOG
DIGITAL
0.1µ
+5V 0.1µ
INPUT 75 47p
0.1µ
47p
75
22n 113
+5V
÷2
÷1
4 3 2 1 28 27 26
ECL
DATA
INPUTS 5 DDI
6
DDI
7 VCC2
8 SDI
9 SDI
10 ƒ/2
11 VEE3
GS9005A
25
SDO
24
SDO
23
SCO
22
SCO
21 +5V
SS1
SS0 20
CD 19
12 13 14 15 16 17 18
+5V
5.6p
910
10n
0.1µ
See Figure 18
390
390
100
100
100
100
390
390
10k
DATA
DATA
CLOCK
CLOCK
CARRIER
DETECT
OUTPUT
STAR
ROUTED
LOOP
VOLTAGE
TEST
POINT
All resistors in ohms, all capacitors in microfarads, all inductors in henries unless otherwise stated.
Fig.16 GS9005A Typical Test Circuit Using +5V Supply
TEST SETUP
Figure 16 shows a typical circuit for the GS9005A using a +5
volt supply. The four 0.1µF decoupling capacitors must be
placed as close as possible to the corresponding VCC pins.
The loop voltage can be conveniently measured across the
10nF capacitor in the loop filter. Tuning procedures are
described in the Temperature Compensation Section
(page 11). The fixed value frequency setting resistors should
be placed close to the corresponding pins on the GS9005A.
The layout of the loop filter and RVCO components requires
careful attention. This has been detailed in an application
note entitled "Optimizing Circuit and Layout Design of the
GS9005A/15A", Document No. 521 - 32 - 00.
When the Direct Digital Inputs are not used, one of these
inputs should be connected to VCC to avoid picking up noise
and unwanted signals.
The Carrier Detect is an open-collector active high output
requiring a pull-up resistor of approximately 10 kΩ.
The SS0, SS1, CD pins should see a low AC impedance. This
is particularly important when driving the SS0, SS1 pins with
external logic. The use of 1 nF decoupling capacitors at these
pins ensures this.
Figure 17 shows the GS9005A connections when using a -5
volt supply.
9
520 - 28 - 11
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