GS8150V18AB Просмотр технического описания (PDF) - Giga Semiconductor

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производитель

GS8150V18AB

1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM

Giga Semiconductor 

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GS8150V18/36AB-357/333/300/250

Undershoot Measurement and Timing

VIH

VSS

50%

VSS – 1.0 V

20% tKC

Capacitance

(TA = 25oC, f = 1 MHZ, VDD = 1.8 V)

Parameter

Symbol

Input Capacitance

Output Capacitance

Output Capacitance (Clock)

Note:

This parameter is sample tested.

CIN

COUT

CIN(CK)

AC Test Conditions

Parameter

Input high level

Input low level

Input rise/fall time (10% to 90%)

Input reference level

Clock input reference level

Output reference level

Clock (VDIF)

Clock (VCM)

VDDQ

RQ

Overshoot Measurement and Timing

VDD + 1.0 V

50%

20% tKC

VDD

VIL

Test conditions

VIN = 0 V

VOUT = 0 V

VIN = 0 V

Max. Unit

4

pF

5

pF

5

pF

Conditions

1.25 V

0.25 V

0.5 ns/0.5 ns

VDDQ/2

Differential cross point

VDDQ/2

0.75 V

0.75 V

1.5 V

250Ω

Rev: 1.04 4/2005

10/25

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2003, GSI Technology

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