FXL2SD106 Просмотр технического описания (PDF) - Fairchild Semiconductor

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FXL2SD106

Low Voltage Dual Supply 6-Bit SD Interface Voltage Translator with Configurable Voltage Supplies and Signal Levels, 3-State Outputs, and Auto Direction Sensing

Fairchild Semiconductor 

VOUT

trise

VOH

80% x VCCO

20% x VCCO

VOL

Time

IOHD ≈ (CL +CI/O) x

∆VOUT

∆t

=

(CL

+CI/O)

x

(20%

–

80%)

tRISE

x

VCCO

Figure 5. Active Output Rise Time and Dynamic

Output Current High

VOH

tfall

VOUT

80% x VCCO

20% x VCCO

VOL

Time

IOLD ≈ (CL +CI/O) x

∆VOUT

∆t

=

(CL +CI/O)

x

(80%

–

20%) x VCCO

tFALL

Figure 6. Active Output Fall Time and Dynamic

Output Current Low

tW

DATA

IN

VCCI/2

VCCI/2

Max. data rate, f = 1/tW

Figure 7. Maximum Data Rate

VCCI

GND

DATA

OUTPUT

Vmo

tskew

Vmo

VCCO

GND

tskew

DATA

OUTPUT

Vmo

VCCO

Vmo

GND

tskew = (tpHLmax – tpHLmin) or (tpLHmax – tpLHmin)

Figure 8. Output Skew Time

©2008 Fairchild Semiconductor Corporation

FXL2SD106 Rev. 1.8.0

10

www.fairchildsemi.com

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