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LC65F1306A Просмотр технического описания (PDF) - SANYO -> Panasonic

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производитель
LC65F1306A Datasheet PDF : 22 Pages
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LC65F1306A
Symbol
Number
of pins
I/O
PE0-PE1
2
I/O
/WDR
PF0/SI/A
4
I/O
D4
PF1/SO/
AD5
PF2/ SCK
/AD6
PF3/ INT
/AD7
RES
1
Input
TEST
1
Input
Function
Option
At reset
I/O port E0 to E1
Open -drain output only
High level
Input in 4-bit unit (IP instruction)
(1) Normal port PE1
output (The
Output in 4-bit unit (OP instruction) (2) Watchdog reset WDR output
Set and reset in 1-bit unit
Either options (1) or N-channel
(SPB and PRB instructions)
(2) can be selected. transistors in
Testing in 1-bit unit
the off state)
(BP and BNP instructions)
PE0 also has a continuous pulse (64
Tcyc) output function.
PE1 becomes the watchdog reset pin
WDR when selected as an option.
I/O port F0 to F3
Identical to those for PA0 to Identical to
The port functions and options are PA3.
those for PA0
identical to those of PE0 to PE1 (See
to PA3.
note).
PF0 to PF3 have shared functions
The serial port
with the serial interface pins and the
functions are
INT input.
disabled.
The function can be selected under
program control.
The interrupt
SI... Serial input pin
source is set to
SO...Serial output pin
INT.
SCK...Input and output of the serial
clock signal.
INT...Interrupt request signal
The serial I/O function can be
switched between 4-bit and 8-bit
transfers under program control.
Note: There is no continuous pulse
output function.
All four pins have shared function.
PF0/AD4: AD converter input AD4
PF1/AD5: AD converter input AD5
PF2/AD6: AD converter input AD6
PF3/AD7: AD converter input AD7
System reset input
-
-
Provide an external capacitor for the
power-on reset.
Apply low level to this pin for 4 or
more clock cycles to reset and restart
the program.
Test pin for LSI.
-
-
This pin must be connected to VSS
during normal operation.
Handling
when
unused
Identical to
those for
PA0 to
PA3.
Identical to
those for
PA0 to
PA3.
-
This pin
must be
connected
to VSS.
No.6829-8/22

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