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MSM63P180-XXXNGS-BK Просмотр технического описания (PDF) - Oki Electric Industry

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MSM63P180-XXXNGS-BK Datasheet PDF : 35 Pages
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¡ Semiconductor
MSM63P180
Table 2 shows the secondary functions of each pin of the MSM63P180.
Table 2 Pin Descriptions (Secondary Functions)
Function
Symbol
PB.0/INT0
PB.1/INT0
PB.2/INT0
PB.3/INT0
PC.0/INT1
PC.1/INT1
PC.2/INT1
PC.3/INT1
PE.3/INT2
External
Interrupt
PF.0/INT3
PF.1/INT3
PF.2/INT3
PF.3/INT3
P8.3/INT4
Capture
P0.0/INT5
P0.1/INT5
P0.2/INT5
P0.3/INT5
P1.0/INT5
P1.1/INT5
P1.2/INT5
P1.3/INT5
P1.0/TBCAP0
P1.1/TBCAP1
PB.0/TM0CAP
PB.1/TM1CAP
Pin Type
Description
108
External 0 interrupt input pins.
107
The change of input signal level causes an interrupt to occur.
I
106
The Port B Interrupt Enable register (PBIE) enables or disables
105
an interrupt for each bit.
104
External 1 interrupt input pins.
103
The change of input signal level causes an interrupt to occur.
I
102
The Port C Interrupt Enable register (PCIE) enables or disables
101
an interrupt for each bit.
External 2 interrupt input pin.
93
I
The change of input signal level causes an interrupt to occur.
92
External 3 interrupt input pins.
91
The change of input signal level causes an interrupt to occur.
I
90
The Port F Interrupt Enable register (PFIE) enables or disables
89
an interrupt for each bit.
External 4 interrupt input pin.
117
I
The change of input signal level causes an interrupt to occur.
154
External 5 interrupt input pins.
153
The change of input signal level causes an interrupt to occur.
152
The Port 0 Interrupt Enable register (P0IE) and Port 1 Interrupt
151
Enable register (P1IE) enable or disable an interrupt for each bit.
I
150
149
148
147
150
I Time base counter capture trigger input pins
149
108
I Timer 0 capture trigger input pin
107
I Timer 1 capture trigger input pin
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