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FM24C16UTM8 Просмотр технического описания (PDF) - Fairchild Semiconductor
Номер в каталоге
Компоненты Описание
производитель
FM24C16UTM8
16K-Bit Standard 2-Wire Bus Interface Serial EEPROM
Fairchild Semiconductor
FM24C16UTM8 Datasheet PDF : 14 Pages
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Write Cycle Timing
SCL
SDA
8th BIT
ACK
Note:
WORD n
STOP
CONDITION
tWR
START
CONDITION
The write cycle time (t
WR
) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle.
Typical System Configuration
VCC
VCC
SDA
SCL
Master
Transmitter/
Receiver
Slave
Receiver
Slave
Transmitter/
Receiver
Master
Transmitter
Master
Transmitter/
Receiver
Note:
Due to open drain configuration of SDA and SCL, a bus-level pull-up resistor is called for, (typical value = 4.7k
Ω
)
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FM24C16U/17U Rev. A.3
www.fairchildsemi.com
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