MT4LC4M16R6TG-6S Просмотр технического описания (PDF) - Micron Technology
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MT4LC4M16R6TG-6S Datasheet PDF : 24 Pages
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4 MEG x 16
EDO DRAM
RAS# VVIIHL
CAS#
V IH
V IL
ADDR
V IH
V IL
WE#
V IH
V IL
DQ
V IOH
V IOL
OE#
V
V
IH
IL
READ-WRITE CYCLE
(LATE WRITE and READ-MODIFY-WRITE cycles)
tRWC
tRAS
tCRP
tRCD
tCSH
tRSH
tCAS
tASR
tAR
tRAD
tRAH
ROW
tASC
tCAH
COLUMN
tRCS
tRWD
tCWD
tAWD
tACH
tCWL
tRWL
tWP
tCLZ
OPEN
tAA
tRAC
tCAC
tOE
tDS
tDH
VALID D OUT
tOD
VALID D IN
tOEH
tRP
ROW
OPEN
DON’ T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
tAA
tACH
tAR
tASC
tASR
tAWD
tCAC
tCAH
tCAS
tCLCH
tCLZ
tCRP
tCSH
tCWD
tCWL
tDH
MIN
12
38
0
0
42
8
8
5
0
5
38
28
8
8
-5
MAX
25
13
10,000
MIN
15
45
0
0
49
10
10
5
0
5
45
35
10
10
-6
MAX
30
15
10,000
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
tDS
tOD
tOE
tOEH
tRAC
tRAD
tRAH
tRAS
tRCD
tRCS
tRP
tRSH
tRWC
tRWD
tRWL
tWP
MIN
0
0
8
9
7
50
11
0
30
13
116
67
13
5
-5
MAX
12
12
50
10,000
MIN
0
0
10
12
10
60
14
0
40
15
140
79
15
5
-6
MAX
15
15
60
10,000
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4 Meg x 16 EDO DRAM
D29_2.p65 – Rev. 5/00
15
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