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FAN5018B Просмотр технического описания (PDF) - Fairchild Semiconductor

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Компоненты Описание
производитель
FAN5018B
Fairchild
Fairchild Semiconductor Fairchild
FAN5018B Datasheet PDF : 30 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRODUCT SPECIFICATION
FAN5018B
Pin Definitions (continued)
Pin Number
16
17
18
19
20–23
24–27
28
Pin Name
CSREF
CSSUM
CSCOMP
GND
SW[4:1]
PWM[4:1]
VCC
Pin Function Description
Current Sense Reference. Non-Inverting input of the current sense amp. Sense
point for the output voltage used for OVP and PWRGD.
Current Sense Summing node. Inverting input of the current sense amp.
Current Sense Compensation node. Output of the current sense amplifier. This
pin is used, in conjunction with CSSUM to set the output droop compensation and
current loop response.
Ground. Signal ground for the device.
Phase Current Sense/Balance inputs. Phase-to-phase current sense and
balancing inputs. Unused phases should be left open.
PWM outputs. CMOS outputs for driving external gate driver such as the FAN5009.
Unused phases should be connected to Ground.
Chip Power. Bias supply for the chip. Connect directly to a +12V supply. Bypass
with a 1µF MLCC capacitor.
REV. 1.0.0 Jul/15/05
3

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