EVB71122 Просмотр технического описания (PDF) - Melexis Microelectronic Systems

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EVB71122

300 to 930MHz Receiver Evaluation Board Description

Melexis Microelectronic Systems  

EVB71122

300 to 930MHz Receiver

Evaluation Board Description

3.1.2 Control Word R1

Name

CPCUR

PFDPOL

LDERR

LDTIME

LDMODE

VCORANGE

VCOCUR

VCOBUF

PRESCUR

SHOWLD

Bits

Description

charge pump current setting

00 100µA

[1:0] 01 400µA

10 400µA static down

11 400µA static up

#default

[2]

0 negative

1 positive

PFD output polarity

#default

[3]

0 15ns

1 30ns

lock detector time error

#default

lock detection time

[5:4]

00 2/fR

01 4/fR

10 8/fR

11 16/fR

#default

PRELIMINARY minimum time span before lock in

fR is the reference oscillator frequency fRO divided by R, see section 4.1.5 (R4)

lock detector mode

[6]

0 check lock condition permanently

1 check lock condition until 1st lock in

#default

VCO range

[7]

0 3V supply

1 5V supply

#default

VCO range setting for different VCCs.

[8]

0 450µA

1 520µA

VCO core current

#default

VCO buffer current

[9]

0 900µA

#default

1 1040µA

prescaler 32/33 reference current

[10]

0 20µA

1 30µA

#default

30µA may be used for fRF = 868/915MHz

function of LDRSSIL bit

[11]

0 RSSIL (RSSI low flag)

1 LD (lock detection flag)

#default

select output data of LDRSSIL, see section 4.1.8 (R7)

39012 71122 01

Rev. 001

Page 16 of 32

EVB Description

Sept/06

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