EVB71122 Просмотр технического описания (PDF) - Melexis Microelectronic Systems

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EVB71122

300 to 930MHz Receiver Evaluation Board Description

Melexis Microelectronic Systems  

EVB71122

300 to 930MHz Receiver

Evaluation Board Description

3.1.1 Control Word R0

Name

OPMODE

LNAGAIN

MIX1GAIN

MIX2GAIN

IFFGAIN

DEMGAIN

SSBSEL

SLCSEL

DTAPOL

Bits

Description

operation mode

00 shutdown

[1:0] 01 receive mode

10 reference oscillator & BIAS only

11 synthesizer only

#default

LNA gain

00 lowest gain

[3:2] 01 low gain

10 high gain

11 highest gain

(-18dB)

(-4dB)

(0dB)

(+2dB)

#default

gain values are relative to gain at default

1st Mixer gain

[4]

0 high gain

(14dB)

#default

1 low gain

(0dB)

2nd Mixer gain

[5]

0 high gain

(9dB)

#default

PRELIMINARY 1 low gain

(-2dB)

intermediate frequency filter gain

00 lowest gain

[7:6] 01 low gain

10 high gain

11 highest gain

(-14dB)

(-6dB)

(0dB)

(+6dB)

#default

[8]

0 low gain

1 high gain

demodulator gain

(~ 4mV/kHz)

(~ 15mV/kHz)

single side band selection

#default

[9]

0 upper side band LO2 low-side inj. (IF1 = LO2 + IF2)

1 lower side band LO2 high-side inj. (IF1 = LO2 – IF2)

#default

Internal IF2 = 2MHz

slicer mode select

[9]

0 averaging Data Slicer mode

#default

1 peak detector Data Slicer mode

data output polarity OA2

0 inverted

[11]

‘1’ for space at ASK or fmin at FSK, ‘0’ for mark at ASK or fmax at FSK

1 normal

#default

‘0’ for space at ASK or fmin at FSK, ‘1’ for mark at ASK or fmax at FSK

39012 71122 01

Rev. 001

Page 15 of 32

EVB Description

Sept/06

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