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AD7304BR(RevA) Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
AD7304BR
(Rev.:RevA)
ADI
Analog Devices ADI
AD7304BR Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7304/AD7305–SPECIFICATIONS (@ VDD = +3 V or +5 V, VSS = 0 V; or VDD = +5 V and VSS = –5 V, VSS
VREF VDD, –40؇C < TA < +85؇C/+125؇C, unless otherwise noted.)
Parameter
Symbol Condition
3 V ؎ 10% 5 V ؎ 10% ؎5 V ؎ 10% Units
STATIC PERFORMANCE
Resolution1
Integral Nonlinearity2
Differential Nonlinearity
Zero-Scale Error
Full-Scale Voltage Error
Full-Scale Tempco3
N
INL
DNL
VZSE
VFSE
TCVFS
Monotonic, All Codes 0 to FFH
Data = 00H
Data = FFH
8
8
8
±1
±1
±1
±1
±1
±1
15
15
± 15
±4
±4
±4
5
5
5
REFERENCE INPUT
VREFIN Range
Input Resistance (AD7304)
Input Resistance (AD7305)
Input Capacitance3
VREFIN
RREFIN
RREFIN
CREFIN
Code = 55H
All DACs at Code = 55H
VSS/VDD
28
7.5
5
VSS/VDD
28
7.5
5
VSS/VDD
28
7.5
5
ANALOG OUTPUTS
Output Voltage Range
Output Current Drive
Shutdown Resistance
Capacitive Load3
VOUT
IOUT
ROUT
CL
Code = 80H, VOUT < 1 LSB
DAC Outputs Placed in Shutdown State
No Oscillation
VSS/VDD
±3
120
200
VSS/VDD
±3
120
200
VSS/VDD
±3
120
200
LOGIC INPUTS
Logic Input Low Voltage
VIL
Logic Input High Voltage
VIH
Input Leakage Current5
IIL
Input Capacitance3
CIL
0.6
0.8
0.8
2.1
2.4
2.4
± 10
± 10
± 10
8
8
8
AC CHARACTERISTICS3
Output Slew Rate
Reference Multiplying
Total Harmonic Distortion
Settling Time6
Shutdown Recovery Time
Time to Shutdown
DAC Glitch
Digital Feedthrough
Feedthrough
SR
BW
THD
tS
tSDR
tSDN
Q
Q
VOUT/VREF
Code = 00H to FFH to 00H
Small Signal, VSS = –5 V
VREF = 4 V p-p, VSS = –5 V, f = 1 kHz
To ± 0.1% of Full Scale
To ± 0.1% of Full Scale
Code = 00H, VREF =1 V p-p, f = 100 kHz
1/2.7
1.1/2
2
15
15
2
1/3.6
1.0/2
2
15
15
2
1/3.6
2.6
0.025
1.0/2
2
15
15
2
–65
SUPPLY CHARACTERISTICS
Positive Supply Current
Negative Supply Current
Power Dissipation
Power Down
Power Supply Sensitivity
IDD
ISS
PDISS
IDD_SD
PSS
VLOGIC = 0 V or VDD, No Load
VSS = –5 V
VLOGIC = 0 V or VDD, No Load
SDI/SHDN = Floating
VDD = ± 10%
6
15
40
0.004
6
30
40
0.004
6
6
60
40
0.004
NOTES
1One LSB = VREF/256.
2The first three codes (00H, 01H, 10H) are excluded from the integral nonlinearity error measurement in single supply operation +3 V or +5 V.
3These parameters are guaranteed by design and not subject to production testing.
4Typicals represent average readings measured at +25°C.
5SDI/SHDN and A0/SHDN pins have 30 µA maximum IIL input leakage current.
6The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground in single supply operation.
Specifications subject to change without notice.
Bits
LSB max
LSB max
mV max
LSB max
ppm/°C typ4
V min/max
ktyp
ktyp
pF typ
V min/max
mA typ
ktyp
pF typ
V min
V max
µA max
pF max
V/µs min/typ
MHz typ
%
µs typ/max
µs max
µs typ
nVs typ
nVs typ
dB
mA max
mA max
mW max
µA typ
%/%
5V
VREF = 10V p-p
f = 20kHz
5V
0V
0V
–5V
VOUT = 10V p-p
–5V
(OUT)
(IN)
Figure 1. AD7304/AD7305 Rail-to-Rail Reference Input to Output at 20 kHz
–2–
REV. A

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