EM78P153SPJ Просмотр технического описания (PDF) - Elan Microelectronics Corp

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EM78P153SPJ

8-bit microprocessor designed and developed with low-power and high-speed CMOS technology

Elan Microelectronics Corp 

EM78P152/3S

8-Bit Microcontroller with OTP ROM

„ The Data Memory Configuration is as follows:

Address

R PAGE Registers

00

R0 (IAR)

Reserve

01

R1 (TCC)

CONT

02

R2 (PC)

Reserve

03

R3 (Status)

Reserve

04

R4 (RSR)

Reserve

05

R5 (Port 5)

IOC5

06

R6 (Port 6)

IOC6

07

Reserve

Reserve

08

Reserve

Reserve

09

Reserve

Reserve

0A

Reserve

Reserve

0B

Reserve

IOCB

0C

Reserve

IOCC

0D

Reserve

IOCD

0E

Reserve

IOCE

0F

RF (Interrupt Status)

IOCF

10

:

General Registers

2F

IOC PAGE Registers

(Control Register)

(I/O Port Control Register)

(I/O Port Control Register)

(Pull-down Register)

(Open-drain Control)

(Pull-high Control Register)

(WDT Control Register)

(Interrupt Mask Register)

Figure 5-3 Data Memory Configuration

5.1.4 R3 (Status Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RST

GP1

GP0

T

P

Z

DC

C

Bit 7 (RST): Bit for reset type

0 : Set to 0 if the device wakes up from other reset type

1 : Set to 1 if the device wakes up from sleep mode on a pin change

Bits 6 ~5 (GP1 ~ GP0): General-purpose read/write bits

Bit 4 (T):

Time-out bit

Set to “1” with the "SLEP" and "WDTC" commands, or during power up;

and reset to “0” by WDT time-out.

Bit 3 (P):

Power down bit

Set to “1” during power on or by a "WDTC" command; and reset to “0” by

a "SLEP" command.

Bit 2 (Z): Zero flag

Set to "1" if the result of an arithmetic or logic operation is zero.

Bit 1 (DC): Auxiliary carry flag

Bit 0 (C): Carry flag

Product Specification (V1.8) 09.08.2009

•7

(This specification is subject to change without further notice)

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