EM78862C
8-Bit RISC Type Microprocessor
6.1.4 R3 (Status Register)
Bit 7
PAGE
Bit 6
Bit 5
Bit 4
IOCP1S IOCPAGE
T
Bit 3
P
Bit 2
Z
Bit 1
DC
Bit 0
C
Bit 0 (C): Carry flag
Bit 1 (DC): Auxiliary carry flag
Bit 2 (Z): Zero flag
Bit 3 (P): Power down bit.
Set to 1 during power on or by "WDTC" command and reset to 0 by "SLEP"
command.
Bit 4 (T): Time-out bit.
Set to 1 by the "SLEP" and "WDTC" command, or during power up. Reset
to 0 by WDT timeout.
Event
T
WDT wake-up from sleep mode
0
WDT time out (not sleep mode)
0
RESET wake up from sleep
1
Power up
1
Low pulse on RESET pin
X
P
Remark
0
1
0
1
X
X =Don't care
Bit 5 (IOCPAGE): Change IOC5 ~ IOCE to another page,
0/1 → Page0/Page1 or 2 (determined by R3 Bit 6)
Bit 6 (IOCP1S): Change IOC PAGE1 and PAGE2 to another option register
0/1 → page1/page2
(Refer to Fig. 3, Data Memory Configuration for the control register Configuration
details.)
Bit 6 (IOCP1S)
X
0
1
Bit 5 (IOCPAGE)
0
1
1
Page Select
PAGE 0
PAGE 1
PAGE 2
Remark
X =Don't care
Bit 7 (PAGE):
Change RA ~ RE to another page
0/1 → page0/page1
(Refer to Fig. 3, Data Memory Configuration for the control register Configuration
details.)
8•
Product Specification (V2.1) 07.13.2005
(This specification is subject to change without further notice)