EL7515(2005) Просмотр технического описания (PDF) - Intersil
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EL7515 Datasheet PDF : 9 Pages
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EL7515
filter connected to VDD can be utilized to reduce the voltage.
If VO is larger than 10V, then:
R4
=
V-----O-----–-----1---0--
IDD
where IDD is shown in IDD vs FS curve. Otherwise, R4 can
be 10Ω to 51Ω with C4 = 0.1µF.
Thermal Performance
The EL7515 uses a fused-lead package, which has a
reduced θJA of 100°C/W on a four-layer board and 115°C/W
on a two-layer board. Maximizing copper around the ground
pins will improve the thermal performance.
This chip also has internal thermal shut-down set at around
135°C to protect the component.
Layout Considerations
The layout is very important for the converter to function
properly. Power Ground ( ) and Signal Ground ( ) should
be separated to ensure that the high pulse current in the
Power Ground never interferes with the sensitive signals
connected to Signal Ground. They should only be connected
at one point.
The trace connected to pin 8 (FB) is the most sensitive trace.
It needs to be as short as possible and in a “quiet” place,
preferably between PGND or SGND traces.
In addition, the bypass capacitor connected to the VDD pin
needs to be as close to the pin as possible.
The heat of the chip is mainly dissipated through the SGND
pin. Maximizing the copper area around it is preferable. In
addition, a solid ground plane is always helpful for the EMI
performance.
The demo board is a good example of layout based on these
principles. Please refer to the EL7515 Application Brief for
the layout.
8
FN7120.1
May 13, 2005
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