EL5412 Просмотр технического описания (PDF) - Intersil
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EL5412 Datasheet PDF : 8 Pages
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EL5412
Where:
• i = Channel 1 to 4
• VS = Total supply voltage
• ISMAX = Maximum supply current per amplifier
• VOUTi = Maximum output voltage of the application
• ILOADi = Load current
If we set the two PDMAX equations equal to each other, we
can solve for RLOADi to avoid device overheat. Figure 10
and Figure 11 provide a convenient way to see if the device
will overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
simple matter to see if PDMAX exceeds the device's power
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves shown in
Figures 10 and 11.
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - HTSSOP
EXPOSED DIEPAD SOLDERED TO PCB PER
JESD51-5
3.5
MAX
3
2.632W
TJ=125°C
2.5
2
1.5
1.0W
1
0.5
θJA =H3T8S°CSO/WP14
θJAT=S1S00O°PC1/W4
0
0
25
50
75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
PACKAGE MOUNTED ON A JEDEC JESD51-3
LOW EFFECTIVE THERMAL CONDUCTIVITY
TEST BOARD
1200
MAX
1000
TJ=125°C
800
694mW
600
606mW
400
200
θJA =Tθ1JSA6S5H=O°1TCP4S/41WS°4OCP/W14
0
0
25
50
75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Unused Amplifiers
It is recommended that any unused amplifiers be configured
as a unity gain follower. The inverting input should be directly
connected to the output and the non-inverting input tied to
the ground plane.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5412 can provide gain at high frequency. As with any
high-frequency device, good printed circuit board layout is
necessary for optimum performance. Ground plane
construction is highly recommended, lead lengths should be
as short as possible and the power supply pins must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the VS- pin is connected to ground,
a 0.1µF ceramic capacitor should be placed from VS+ to pin
to VS- pin. A 4.7µF tantalum capacitor should then be
connected in parallel, placed in the region of the amplifier.
One 4.7µF capacitor may be used for multiple devices. This
same capacitor combination should be placed at each
supply pin to ground if split supplies are to be used.
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8
FN7394.1
December 22, 2004
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