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DS2746 Просмотр технического описания (PDF) - Maxim Integrated

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DS2746 Datasheet PDF : 16 Pages
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Figure 4. APPLICATION EXAMPLE
DS2746 Low-Cost 2-Wire Battery Monitor
Protection IC
(Li+/Polymer)
1nF
1nF
Pack+
150
1K
PackID
Therm
Pack-
VOUT
VIN
VDD
(1) 5.6V 10nF
AIN0
1K
SDA
AIN1
SCL
1K
VSS
SNS
CTG
DS2746
RSNS
(1) Optional for 8kV/15kV ESD
2.5V (1)
System
VDD
System
Serial
Bus
System
VSS
POWER MODES
The DS2746 operates in one of two power modes: active and sleep. While in active mode, the DS2746 operates as
a high-precision battery monitor with voltage, auxiliary inputs, current and accumulated current measurements
acquired continuously and the resulting values updated in the measurement registers. Read and write access is
allowed to all registers. In sleep mode, the DS2746 operates in a low-power mode with no measurement activity.
The DS2746 operating mode transitions from SLEEP to ACTIVE when:
( SCL > VIH ) OR ( SDA > VIH )
The DS2746 operating mode transitions from ACTIVE to SLEEP when:
SMOD = 1 AND [ ( SCL < VIL ) AND ( SDA < VIL ) ] for tSLEEP
CAUTION: If SMOD = 1, a pull-up resistor is required on SCL and SDA in order to ensure that the DS2746
transitions from SLEEP to ACTIVE mode when the battery is charged. If the bus is not pulled up, the DS2746
remains in SLEEP and cannot accumulate the charge current.
MEASUREMENT SEQUENCE
The DS2746 uses seperate A/D converters to make voltage and current measurements. Each A/D converter
operates completely independent of the other, allowing measurements of voltage and current to be made in
parallel. Current Measurements are made at a resolution of 13 bits plus sign bit. The current register is updated
every 878ms with the average for that time period.
All Voltage Measurements are made at a resolution of 11 bits plus sign bit. The DS2746 continouly cycles through
measuring VIN, AIN0, and AIN1 in that order. Voltage measurement of each input requires 220ms to complete. A
full sequence of voltage measurements requires 660ms to complete. VOUT is active for a precharge time of tPRE
before the AIN0 measurement time occurs. The VOUT pin is enabled during the entire AIN0 and AIN1 measurement
sequence as long as the VODIS (VOUT Disable) bit is cleared. See Figure 5.
7 of 16

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