DS26334GN(2005) Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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Компоненты Описание

производитель

DS26334GN
(Rev.:2005)

3.3V, 16-Channel, E1/T1/J1 Short- and Long-Haul Line Interface Unit

Dallas Semiconductor -> Maxim Integrated 

DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit

LIST OF TABLES

Table 4-1. Pin Descriptions........................................................................................................................................ 10

Table 5-1. Parallel Port Mode Selection and Pin Functions ...................................................................................... 19

Table 5-2. Telecommunications Specification Compliance for DS26334 Transmitters ............................................ 22

Table 5-3. Registers Related to Control of DS26334 Transmitters ........................................................................... 22

Table 5-4. Template Selections for Short-Haul Mode ............................................................................................... 23

Table 5-5. Template Selections for Long-Haul Mode ................................................................................................ 23

Table 5-6. LIU Front-End Values ............................................................................................................................... 27

Table 5-7. Loss Criteria T1.231, G.775, and ETSI 300 233 Specifications............................................................... 29

Table 5-8. AIS Criteria T1.231, G.775, and ETSI 300 233 Specifications................................................................. 30

Table 5-9. AIS Detection and Reset Criteria for DS26334 ........................................................................................ 30

Table 5-10. Registers Related to AIS Detection........................................................................................................ 30

Table 5-11. BPV, Code Violation, and Excessive Zero Error Reporting ................................................................... 31

Table 5-12. Pseudorandom Pattern Generation........................................................................................................ 35

Table 5-13. Repetitive Pattern Generation ................................................................................................................ 35

Table 6-1. Primary Register Set ................................................................................................................................ 40

Table 6-2. Secondary Register Set............................................................................................................................ 41

Table 6-3. Individual LIU Register Set ....................................................................................................................... 42

Table 6-4. BERT Register Set ................................................................................................................................... 43

Table 6-5. Primary Register Set Bit Map ................................................................................................................... 44

Table 6-6. Secondary Register Set Bit Map .............................................................................................................. 45

Table 6-7. Individual LIU Register Set Bit Map.......................................................................................................... 46

Table 6-8. BERT Register Bit Map ............................................................................................................................ 47

Table 6-9. G.772 Monitoring Control (LIU 1) ............................................................................................................. 53

Table 6-10. G.772 Monitoring Control (LIU 9) ........................................................................................................... 53

Table 6-12. TST Template Select Transmitter Register ............................................................................................ 57

Table 6-13. TST Template Select Transmitter Register ............................................................................................ 57

Table 6-14. Template Selection................................................................................................................................. 58

Table 6-15. Address Pointer Bank Selection............................................................................................................. 61

Table 6-16. DS26334 MCLK Selections .................................................................................................................... 67

Table 6-17. Receiver Sensitivity/Monitor Mode Gain Selection ................................................................................ 72

Table 6-18. Receiver Signal Level............................................................................................................................. 73

Table 6-19. Bit Error Rate Transceiver Select for Channels 1–8 .............................................................................. 76

Table 6-20. Bit Error Rate Transceiver Select for Channels 9–16 ............................................................................ 76

Table 6-21. PLL Clock Select .................................................................................................................................... 78

Table 6-22. Clock A Select ........................................................................................................................................ 79

Table 7-1. Instruction Codes for IEEE 1149.1 Architecture....................................................................................... 92

Table 7-2. ID Code Structure..................................................................................................................................... 93

Table 7-3. Device ID Codes....................................................................................................................................... 93

Table 8-1. DC Pin Logic Levels ................................................................................................................................. 94

Table 8-2. Pin Capacitance ....................................................................................................................................... 94

Table 8-3. Supply Current and Output Voltage ......................................................................................................... 94

Table 9-1. Transmitter Characteristics....................................................................................................................... 95

Table 9-2. Receiver Characteristics........................................................................................................................... 95

Table 9-3. Intel Read Mode Characteristics .............................................................................................................. 96

Table 9-4. Intel Write Cycle Characteristics .............................................................................................................. 99

Table 9-5. Motorola Read Cycle Characteristics ..................................................................................................... 102

Table 9-6. Motorola Write Cycle Characteristics ..................................................................................................... 105

Table 9-7. Serial Port Timing Characteristics .......................................................................................................... 108

Table 9-8. Transmitter System Timing..................................................................................................................... 109

Table 9-9. Receiver System Timing......................................................................................................................... 109

Table 9-10. JTAG Timing Characteristics................................................................................................................ 111

Table 12-1. Thermal Characteristics........................................................................................................................ 114

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