DS2407 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2407

Dual Addressable Switch Plus 1K–Bit Memory

Dallas Semiconductor -> Maxim Integrated 

HIERARCHICAL STRUCTURE FOR 1–WIRE PROTOCOL Figure 2

BUS

MASTER

1–WIRE BUS

DS2407

OTHER

DEVICES

COMMAND

LEVEL:

1–WIRE ROM FUNCTION

COMMANDS (SEE FIGURE 12)

DS2407

AVAILABLE

COMMANDS:

READ ROM

MATCH ROM

SEARCH ROM

SKIP ROM

CONDITIONAL

SEARCH ROM

DS2407 SPECIFIC

MEMORY FUNCTION

COMMANDS

(SEE FIGURE 6)

WRITE MEMORY

WRITE STATUS

READ MEMORY

READ STATUS

EXT. READ MEMORY

CHANNEL ACCESS

DATA FIELD

AFFECTED:

64–BIT ROM

64–BIT ROM

64–BIT ROM

N/A

64–BIT ROM,

CONDITIONAL SEARCH

SETTINGS AT STATUS

MEMORY LOCATION 7,

DEVICE/CHANNEL STATUS

1024–BIT EPROM

STATUS MEMORY

1024–BIT EPROM

STATUS MEMORY

1024–BIT EPROM

PIO CHANNELS

64–BIT LASERED ROM Figure 3

8–Bit CRC Code

48–Bit Serial Number 8–Bit Family Code (12H)

MSB

LSB MSB

LSB MSB

LSB

012099 5/31

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