DS21554 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS21554

DS21354 (3.3V) and DS21554 (5V) E1 Single Chip Transceivers (SCT)

Dallas Semiconductor -> Maxim Integrated 

TABLE OF CONTENTS

DS21354 & DS21554

1 LIST OF FIGURES .......................................................................................................................5

2 LIST OF TABLES.........................................................................................................................6

3 INTRODUCTION .........................................................................................................................7

3.1 Functional Description...............................................................................................................8

3.2 Document Revision History.......................................................................................................9

4 PIN DESCRIPTION....................................................................................................................11

4.1 Pin Function Description .........................................................................................................15

4.1.1 Transmit Side Pins .........................................................................................................15

4.1.2 Receive Side Pins...........................................................................................................18

4.1.3 Parallel Control Port Pins...............................................................................................20

4.1.4 JTAG Test Access Port Pins ..........................................................................................22

4.1.5 Interleave Bus Operation Pins........................................................................................23

4.1.6 Line Interface Pins .........................................................................................................23

4.1.7 Supply Pins.....................................................................................................................24

5 PARALLEL PORT .....................................................................................................................24

5.1 Register Map............................................................................................................................25

6 CONTROL, ID, AND TEST REGISTERS...............................................................................29

6.1 Power-Up Sequence.................................................................................................................30

6.1.1 Synchronizatrion and Re-synchronization .....................................................................31

6.2 Framer Loopback.....................................................................................................................34

6.3 Automatic Alarm Generation...................................................................................................35

6.4 Remote Loopback ....................................................................................................................37

6.5 Local Loopback .......................................................................................................................34

7 STATUS AND INFORMATION REGISTERS .......................................................................39

7.1 CRC4 Sync Counter.................................................................................................................41

8 ERROR COUNT REGISTERS..................................................................................................44

8.1 BPV or Code Violation Counter..............................................................................................44

8.2 CRC4 Error Counter ................................................................................................................45

8.3 E-Bit Counter...........................................................................................................................45

8.4 FAS Error Counter...................................................................................................................46

9 DS0 MONITORING FUNCTION .............................................................................................46

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