DS21554L Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS21554L

DS21354 (3.3V) and DS21554 (5V) E1 Single Chip Transceivers (SCT)

Dallas Semiconductor -> Maxim Integrated 

DS21354 (3.3V) and DS21554 (5V)

E1 Single Chip Transceivers (SCT)

www.maxim-ic.com

FEATURES

§ Complete E1 (CEPT) PCM-30/ISDN-PRI

transceiver functionality

§ Onboard long and short haul line interface

for clock/data recovery and waveshaping

§ 32-bit or 128-bit crystal-less jitter attenuator

§ Frames to FAS, CAS, CCS, and CRC4

formats

§ Integral HDLC controller with 64-byte

buffers configurable for Sa Bits, DS0 or sub

§ Large counters for bipolar and code

violations, CRC4 code word errors, FAS

word errors, and E bits

§ IEEE 1149.1 JTAG-Boundary Scan

Architecture

§ Pin compatible with DS2154/52/352/552 SCTs

§ 3.3V (DS21354) or 5V (DS21554) supply;

low power CMOS

§ 100-pin LQFP package (14mm X 14mm)

DS0 operation

§ Dual two–frame elastic store slip buffers that

can connect to asynchronous backplanes up

to 8.192MHz

§ Interleaving PCM Bus Operation

§ 8–bit parallel control port that can be used

directly on either multiplexed or non–

multiplexed buses (Intel or Motorola)

§ Extracts and inserts CAS signaling

§ Detects and generates remote and AIS alarms

100

§ Programmable output clocks for Fractional

1

E1, H0, and H12 applications

§ Fully independent transmit and receive

functionality

§ Full access to Si and Sa bits aligned with

CRC-4 multiframe

ORDERING INFORMATION

DS21354L (00 C to 700 C)

DS21354LN (-400 C to +850 C)

§ Four separate loopback functions for testing

functions

DS21554L (00 C to 700 C)

DS21554LN (-400 C to +850 C)

DESCRIPTION

The DS21354/554 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1

lines. The device is an upward compatible version of the DS2153 and DS2154 SCTs. The onboard clock/data

recovery circuitry coverts the AMI/HDB3 E1 waveforms to an NRZ serial stream. The DS21354/554

automatically adjusts to E1 22AWG (0.6 mm) twisted–pair cables from 0 to over 2km in length. The device can

generate the necessary G.703 waveshapes for both 75 ohm coax and 120 ohm twisted cables. The onboard jitter

attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data paths. The

framer locates the frame and multiframe boundaries and monitors the data stream for alarms. It is also used for

extracting and inserting signaling data, Si, and Sa bit information. The onboard HDLC controller can be used

for Sa bit links or DS0s. The device contains a set of internal registers which the user can access and control

the operation of the unit. Quick access via the parallel control port allows a single controller to handle many E1

lines. The device fully meets all of the latest E1 specifications including ITU-T G.703, G.704, G.706, G.823,

G.732, and I.431, ETS 300 011, 300 233, and 300 166, as well as CTR12 and CTR4.

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