DS21348 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS21348

3.3V E1/T1/J1 Line Interface

Dallas Semiconductor -> Maxim Integrated 

2. LIST OF TABLES

DS21348/Q348

Table 4-1 BUS INTERFACE SELECTION ................................................................................................ 9

Table 4-2a PIN ASSIGNMENT IN PARALLEL PORT MODE .............................................................. 10

Table 4-2b PIN DESCRIPTIONS IN PARALLEL PORT MODE (Sorted by Pin Name, DS21348T Pin

Numbering) .......................................................................................................................................... 11

Table 4-3a PIN ASSIGNMENT IN SERIAL PORT MODE..................................................................... 13

Table 4-3b PIN DESCRIPTIONS IN SERIAL PORT MODE (Sorted by Pin Name, DS21348T Pin

Numbering) .......................................................................................................................................... 14

Table 4-4a PIN ASSIGNMENT IN HARDWARE MODE....................................................................... 16

Table 4-4b PIN DESCRIPTIONS IN HARDWARE MODE (Sorted by Pin Name, DS21348T Pin

Numbering) .......................................................................................................................................... 17

Table 4-5 LOOPBACK CONTROL IN HARDWARE MODE ................................................................ 20

Table 4-6 TRANSMIT DATA CONTROL IN HARDWARE MODE ..................................................... 20

Table 4-7 RECEIVE SENSITIVITY SETTINGS...................................................................................... 20

Table 4-8 MONITOR GAIN SETTINGS .................................................................................................. 20

Table 4-9 INTERNAL RX TERMINATION SELECT ............................................................................. 20

Table 4-10 MCLK SELECTION................................................................................................................ 20

Table 5-1 REGISTER MAP ....................................................................................................................... 23

Table 6-1 MCLK SELECTION.................................................................................................................. 29

Table 6-2 RECEIVE SENSITIVITY SETTINGS...................................................................................... 31

Table 6-3 BACK PLANE CLOCK SELECT............................................................................................. 32

Table 6-4 MONITOR GAIN SETTINGS .................................................................................................. 32

Table 6-5 INTERNAL RX TERMINATION SELECT ............................................................................. 33

Table 7-1 RECEIVED ALARM CRITERIA ............................................................................................. 35

Table 7-2 RECEIVE LEVEL INDICATION............................................................................................. 38

Table 8-1 TRANSMIT CODE LENGTH................................................................................................... 40

Table 8-2 RECEIVE CODE LENGTH ...................................................................................................... 40

Table 8-3 DEFINITION OF RECEIVED ERRORS.................................................................................. 44

Table 8-4 FUNCTION OF ECRS BITS AND RNEG PIN ........................................................................ 45

Table 9-1 LINE BUILD OUT SELECT FOR E1 IN REGISTER CCR4 (ETS = 0) ................................. 48

Table 9-2 LINE BUILD OUT SELECT FOR T1 IN REGISTER CCR4 (ETS = 1) ................................. 48

Table 9-3 TRANSFORMER SPECIFICATIONS FOR 3.3V OPERATION ............................................ 48

Table 10-1 DS21Q348 PIN ASSIGNMENT.............................................................................................. 55

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