DS2156 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS2156
Dallas Semiconductor -> Maxim Integrated
DS2156 Datasheet PDF : 262 Pages
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DS2156
23.3.2 Transmit Open-Circuit Detector.........................................................................................................151
23.3.3 Transmit BPV Error Insertion ............................................................................................................151
23.3.4 Transmit G.703 Synchronization Signal (E1 Mode)...........................................................................151
23.4 MCLK PRESCALER .................................................................................................................................152
23.5 JITTER ATTENUATOR...............................................................................................................................152
23.6 CMI (CODE MARK INVERSION) OPTION.................................................................................................152
FIGURE 23-2. CMI CODING ..................................................................................................................................152
23.7 LIU CONTROL REGISTERS ......................................................................................................................153
23.8 RECOMMENDED CIRCUITS.......................................................................................................................160
FIGURE 23-3. BASIC INTERFACE ...........................................................................................................................160
FIGURE 23-4. PROTECTED INTERFACE USING INTERNAL RECEIVE TERMINATION ..............................................161
23.9 COMPONENT SPECIFICATIONS.................................................................................................................162
TABLE 23-A. TRANSFORMER SPECIFICATIONS .....................................................................................................162
FIGURE 23-5. E1 TRANSMIT PULSE TEMPLATE ....................................................................................................163
FIGURE 23-6. T1 TRANSMIT PULSE TEMPLATE ....................................................................................................163
FIGURE 23-7. JITTER TOLERANCE.........................................................................................................................164
FIGURE 23-8. JITTER TOLERANCE (E1 MODE)......................................................................................................164
FIGURE 23-9. JITTER ATTENUATION (T1 MODE)..................................................................................................165
FIGURE 23-10. JITTER ATTENUATION (E1 MODE)................................................................................................165
FIGURE 23-11. OPTIONAL CRYSTAL CONNECTIONS .............................................................................................166
24. UTOPIA BACKPLANE INTERFACE ...................................................................................................167
24.1 DESCRIPTION ...........................................................................................................................................167
24.1.1 List of Applicable Standards...............................................................................................................167
24.1.2 Acronyms and Definitions...................................................................................................................167
24.2 UTOPIA CLOCK MODES.........................................................................................................................168
FIGURE 24-1. UTOPIA CLOCKING CONFIGURATIONS .........................................................................................168
24.3 FULL T1/E1 MODE AND CLEAR-CHANNEL E1 MODE ............................................................................168
24.4 FRACTIONAL T1/E1 MODE ......................................................................................................................169
TABLE 24-A. UTOPIA CLOCK MODE CONFIGURATION ......................................................................................169
24.5 TRANSMIT OPERATION............................................................................................................................170
24.5.1 UTOPIA Side Transmit: Muxed Mode with One Transmit CLAV ......................................................170
FIGURE 24-2. POLLING PHASE AND SELECTION PHASE AT TRANSMIT INTERFACE..............................................171
FIGURE 24-3. END AND RESTART OF CELL AT TRANSMIT INTERFACE................................................................172
FIGURE 24-4. TRANSMISSION TO PHY PAUSED FOR THREE CYCLES...................................................................173
24.5.2 UTOPIA Side Transmit: Direct Status Mode (Multitransmit CLAV) .................................................173
FIGURE 24-5. EXAMPLE OF DIRECT STATUS INDICATION, TRANSMIT DIRECTION ..............................................174
24.5.3 Transmit Processing ...........................................................................................................................175
FIGURE 24-6. TRANSMIT CELL FLOW ...................................................................................................................175
24.6 RECEIVE OPERATION...............................................................................................................................176
24.6.1 Receive Processing .............................................................................................................................176
FIGURE 24-7. CELL-DELINEATION STATE DIAGRAM ...........................................................................................176
FIGURE 24-8. HEADER CORRECTION STATE MACHINE ........................................................................................177
24.6.2 UTOPIA Side Receive: Muxed Mode with One Receive CLAV ..........................................................178
FIGURE 24-9. POLLING PHASE AND SELECTION AT RECEIVE INTERFACE ............................................................178
FIGURE 24-10. END AND RESTART OF CELL TRANSMISSION AT RECEIVE INTERFACE ........................................179
24.6.3 UTOPIA Side Receive: Direct Status Mode (Multireceive CLAV) .....................................................179
FIGURE 24-11. EXAMPLE OF DIRECT STATUS INDICATION, RECEIVE DIRECTION ...............................................180
24.7 REGISTER DEFINITIONS ...........................................................................................................................181
24.8 RECEIVE FIFO OVERRUN........................................................................................................................192
24.9 UTOPIA DIAGNOSTIC LOOPBACK..........................................................................................................192
25. PROGRAMMABLE IN-BAND LOOP CODE GENERATION AND DETECTION........................193
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