DS2155 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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DS2155

T1/E1/J1 Single-Chip Transceiver

Dallas Semiconductor -> Maxim Integrated 

DS2155

2. DATA SHEET REVISION HISTORY

10-9-03

Add revision history table: The previous version of the DS2155 data sheet (12-06-02) did

not incorporate a revision history table and did not describe new features added to B1

revision of the DS2155.

THE FOLLOWING WERE INADVERTENTLY REMOVED FROM THE

PREVIOUS VERSION OF THE DS2155 DATA SHEET

Add CSBGA package information to Ordering Information table on front page

Add CSBGA package thermal characteristics to Operating Parameters section

Add Transmit Line Build Out Control register (TLBC) description

Add Transmit Line Build Out Control register (TLBC) to Port Map

Add Transmit Line Build Out Control register (TLBC) description to LIU TRANSMIT

section

THE FOLLOWING ARE CORRECTIONS TO ERRORS IN THE PREVIOUS

VERSION OF THE DS2155 DATA SHEET

Correct Device ID in Device Identification Register

Correct Device ID in JTAG ID Code table

Correct minimum value for tDHW in AC CHARACTERISTICS: MULTIPLEXED

PARALLEL PORT table. tDHW was changed from 5ns to 0ns

Correct minimum value for tDDR in AC CHARACTERISTICS: MULTIPLEXED

PARALLEL PORT table. tDDR was changed from unstated to 20ns

Corrections to AC CHARACTERISTICS: TRANSMIT SIDE timing table.

1. tCP, tCH, tCL, tLP, tLH, tLL, and tSP typical values have been restated to reflect various IBO

modes.

2. tCH, tCL, tLH, tLL minimum values have been changed from 75ns to 20ns.

3. tSP, tLL minimum values have been changed from 50ns to 20ns.

4. tD3 minimum values have been changed from 75ns to 22ns.

Corrections to AC CHARACTERISTICS: RECEIVE SIDE timing table.

1. tCP, tCH, tCL, tLP, tLH, tLL, and tSP typical values have been restated to reflect various IBO

modes.

2. tCH, tCL, minimum values have been changed from 75ns to 20ns.

3. tSH, tSL minimum values have been changed from 50ns to 20ns.

4. tSH, tSL typical values have been added.

5. tD3, tD4 minimum values have been changed from 50ns to 22ns.

Correct Transmit Signaling Registers (E1 Mode, CCS Format) table in Transmit Signaling

section

The definition of the EGL bit in the LIC1 register has been corrected for both T1 and E1

mode.

T1 Mode: EGL = 1 was changed from 15dB to –15dB

E1 Mode: EGL = 0 was changed from –10dB to –12dB

THE FOLLOWING ARE FORMAT CHANGES AND ADDED OR REMOVED

TEXT, TABLES OR DIAGRAMS

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