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DS1080L Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated

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Компоненты Описание
производитель
DS1080L
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1080L Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Spread-Spectrum Crystal Multiplier
Typical Operating Circuit
CRYSTAL
CL1
CL2
X1
1
GND
2
CMSEL
3
SMSEL
4
DS1080L
X2
8
7 VCC
SSO
6
PDN
5
VCC
DECOUPLING
CAPACITOR
fSSO
VCC
NOTE: IN THE ABOVE CONFIGURATION WITH PDN CONNECTED TO VCC, SMSEL CONNECTED TO GND
AND CMSEL FLOATING, THE DEVICE IS IN NORMAL OPERATION WITH 2x CLOCK MULTIPLICATION, AND
SPREAD-SPECTRUM MAGNITUDE OF ±0.5%.
Applications Information
Crystal Selection
The DS1080L requires a parallel resonating crystal
operating in the fundamental mode, with an ESR of less
than 90. The crystal should be placed very close to
the device to minimize excessive loading due to para-
sitic capacitances.
Oscillator Input
When driving the DS1080L using an external oscillator
clock, consider the input (X1) to be high impedance.
Crystal Capacitor Selection
The load capacitors CL1 and CL2 are selected based
on the crystal specifications (from the data sheet of the
crystal used). The crystal parallel load capacitance is
calculated as follows:
CL
=
CL1 x CL2
CL1 + CL2
CIN
Equation 1
For the DS1080L use CL1 = CL2 = CLX.
In this case, the equation then reduces to:
CL
=
CLX
2
+
CIN
Equation 2
where CL1 = CL2 = CLX.
Equation 2 is used to calculate the values of CL1 and
CL2 based on values on CL and CIN noted in the data
sheet electrical specifications.
Power-Supply Decoupling
To achieve best results, it is highly recommended that
a decoupling capacitor is used on the IC power-supply
pins. Typical values of decoupling capacitors are
0.001µF and 0.1µF. Use a high-quality, ceramic, sur-
face-mount capacitor, and mount it as close as possi-
ble to the VCC and GND pins of the IC to minimize lead
inductance.
Layout Considerations
As noted earlier, the crystal should be placed very
close to the device to minimize excessive loading due
to parasitic capacitances. Care should also be taken to
minimize loading on pins that could be floated as a pro-
gramming option (SMSEL and CMSEL). Coupling on
inputs due to clocks should be minimized.
_____________________________________________________________________ 7

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