DM7476N Просмотр технического описания (PDF) - Fairchild Semiconductor

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производитель

DM7476N

Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

Fairchild Semiconductor 

Switching Characteristics

at VCC = 5V and TA = 25°C

Symbol

Parameter

fMAX

tPHL

tPLH

tPHL

tPLH

tPHL

tPLH

Maximum Clock Frequency

Propagation Delay Time

HIGH-to-LOW Level Output

Propagation Delay Time

LOW-to-HIGH Level Output

Propagation Delay Time

HIGH-to-LOW Level Output

Propagation Delay Time

LOW-to-HIGH Level Output

Propagation Delay Time

HIGH-to-LOW Level Output

Propagation Delay Time

LOW-to-HIGH Level Output

From (Input)

To (Output)

Preset to Q

Preset to Q

Clear to Q

Clear to Q

Clock to Q or Q

Clock to Q or Q

RL = 400Ω, CL = 15 pF

Min

Max

15

40

25

40

25

40

25

Units

MHz

ns

ns

ns

ns

ns

ns

3

www.fairchildsemi.com

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