DAC1627D1G25 Просмотр технического описания (PDF) - NXP Semiconductors.

Номер в каталоге

Компоненты Описание

производитель

DAC1627D1G25

Dual 16-bit DAC, LVDS interface, up to 1.25 Gsps, x2, x4 and x8 interpolating

NXP Semiconductors. 

NXP Semiconductors

DAC1627D1G25

Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating

Table 2. Pin description …continued

Symbol

Pin

Type[1] Description

SDIO

51

IO

SPI data input/output

SCLK

52

I

SPI clock

SCS_N

53

I

SPI chip select (active LOW)

RESET_N

54

I

general reset (active LOW)

VDDA(1V8)_D

55

P

IOUTBN

56

O

1.8 V analog power supply (DAC core)

complementary DAC B output current

IOUTBP

57

O

DAC B output current

VDDA(1V8)_D

58

P

VDDA(3V3)

59

P

AUXBP

60

O

1.8 V analog power supply (DAC core)

3.3 V analog power supply

auxiliary DAC B output current

AUXBN

61

O

complementary auxiliary DAC B output current

VDDA(1V8)_P1

62

P

1.8 V analog power supply (PLL)

VIRES

63

IO

DAC biasing resistor

GAPOUT

64

IO

band gap input/output voltage

VDDA(1V8)_P2

65

P

AUXAN

66

O

1.8 V analog power supply (PLL)

complementary auxiliary DAC A output current

AUXAP

67

O

auxiliary DAC A output current

VDDA(3V3)

68

P

VDDA1V8_D

69

P

IOUTAP

70

O

3.3 V analog power supply

1.8 V analog power supply (DAC core)

DAC A output current

IOUTAN

71

O

complementary DAC A output current

VDDA(1V8)_D

72

P

GND

H

G

1.8 V analog power supply (DAC core)

ground (exposed die pad)

[1] P: power supply; G: ground; I: input; O: output.

[2] The LVDS input data bus order can be reversed and each element can be swapped between P and N using

dedicated registers (see Table 86, Table 87 and Table 88).

7. Limiting values

DAC1627D1G25

Objective data sheet

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

Conditions

Min

VDDA(3V3) analog supply voltage

(3.3 V)

−0.5

VDDD(1V8) digital supply voltage

(1.8 V)

−0.5

VDDA(1V8) analog supply voltage

(1.8 V)

[1] −0.5

VI

input voltage

VO

output voltage

input pins referenced to GND

−0.5

pins IOUTAP, IOUTAN,

−0.5

IOUTBP, IOUTBN, AUXAP,

AUXAN, AUXBP and AUXBN

referenced to GND

Max Unit

+4.6 V

+2.5 V

+2.5 V

<tbd> V

+4.6 V

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 29 April 2011

© NXP B.V. 2011. All rights reserved.

6 of 69

Share Link: