CY3681 Просмотр технического описания (PDF) - Cypress Semiconductor
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CY3681 Datasheet PDF : 48 Pages
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CY7C68013
EP0 IN&OUT 64
EP1 IN 64
EP1 OUT 64
512
EP2
512
512
EP4
512
64
64
64
512
512
EP2
512
512
64
64
64
1024
EP2
1024
512
EP6
512
512
EP8
512
512
512
EP6
512
512
1024
EP6
1024
64
64
64
512
EP2 512
512
512
EP6 512
512
512
EP8
512
64
64
64
64
64
64
1024
1024
1024
EP2
1024
EP2
1024
1024
512
EP8
512
1024
Figure 3-3. Endpoint Configuration
3.12.5 Default Full-Speed Alternate Settings
Table 3-5. Default Full-Speed Alternate Settings[1,2]
Alternate Setting
ep0
ep1out
ep1in
ep2
ep4
ep6
ep8
0
1
64 64
0 64 bulk
0 64 bulk
0 64 bulk out (2×)
0 64 bulk out (2×)
0 64 bulk in (2×)
0 64 bulk in (2×)
2
64
64 int
64 int
64 int out (2×)
64 bulk out (2×)
64 int in (2×)
64 bulk in (2×)
3
64
64 int
64 int
64 iso out (2×)
64 bulk out (2×)
64 iso in (2×)
64 bulk in (2×)
3.12.6 Default High-Speed Alternate Settings
Table 3-6. Default High-Speed Alternate Settings[1, 2]
Alternate Setting
0
1
2
3
ep0
ep1out
ep1in
64 64
0 512 bulk[3]
0 512 bulk[3]
64
64 int
64 int
64
64 int
64 int
ep2
0 512 bulk out (2×)
512 int out (2×)
512 iso out (2×)
ep4
0 512 bulk out (2×)
512 bulk out (2×)
512 bulk out (2×)
ep6
0 512 bulk in (2×)
512 int in (2×)
512 iso in (2×)
ep8
0 512 bulk in (2×)
512 bulk in (2×)
512 bulk in (2×)
Notes:
1. “0” means “not implemented.”
2. “2x” means “double buffered.”
3. Even though these buffers are 64 bytes, they are reported as 512 for USB 2.0 compliance. The user must never transfer packets larger than 64 bytes to EP1.
Document #: 38-08012 Rev. *E
Page 8 of 48
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